<amarko...@wavecomp.com> wrote:
> > ...
> > tcg_gen_extend_s_i32_i64
> > tcg_gen_extend_0_i32_i64
>
> These should not drift too far from the other extension names,
>
> tcg_gen_ext{8,16}{u,s}_i32
> tcg_gen_ext{8,16,32}{u,s}_i64
>
> What if we use the AArch64 mnemonics: zxt (zero-extend) and sxt
(sign-extend)?
> This would give us
>
> tcg_gen_zxt8_i32
> tcg_gen_sxt8_i32
> (etc)
> tcg_gen_zxt_i32_i64
> tcg_gen_sxt_i32_i64
>
After a while, I realized that this idea would remove majority of potential
confusing spots, and even make names slightly shorter: (suppose other names
would remain intact)
* tcg_gen_ext8s_i32 t0, t1 to tcg_gen_sxt8_i32 t0, t1
* tcg_gen_ext8u_i32 t0, t1 to tcg_gen_zxt8_i32 t0, t1
* tcg_gen_ext16s_i32 t0, t1 to tcg_gen_sxt16_i32 t0, t1
* tcg_gen_ext16u_i32 t0, t1 to tcg_gen_zxt16_i32 t0, t1
8 or 16-bit sign/zero extension (both operands must be 32-bit)
* tcg_gen_ext8s_i64 t0, t1 to tcg_gen_sxt8_i64 t0, t1
* tcg_gen_ext8u_i64 t0, t1 to tcg_gen_zxt8_i64 t0, t1
* tcg_gen_ext16s_i64 t0, t1 to tcg_gen_sxt16_i64 t0, t1
* tcg_gen_ext16u_i64 t0, t1 to tcg_gen_zxt16_i64 t0, t1
* tcg_gen_ext32s_i64 t0, t1 to tcg_gen_sxt32_i64 t0, t1
* tcg_gen_ext32u_i64 t0, t1 to tcg_gen_zxt32_i64 t0, t1
8, 16 or 32-bit sign/zero extension (both operands must be 64-bit)
* tcg_gen_ext_i32_i64 t0, t1 to tcg_gen_sxt_i32_i64 t0, t1
Convert t1 (32-bit) to t0 (64-bit) and does sign extension
* tcg_gen_extu_i32_i64 t0, t1 to tcg_gen_zxt_i32_i64 t0, t1
Convert t1 (32-bit) to t0 (64-bit) and does zero extension
Any observation?
Thanks,
Aleksandar
>
> r~
>
