Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
---
target/arm/translate.c | 64 +++++++++++++++---------------------------
target/arm/t16.decode | 10 +++++++
2 files changed, 33 insertions(+), 41 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 9bdcb91537..e2183eb543 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -8406,7 +8406,7 @@ static bool trans_BX(DisasContext *s, arg_BX *a)
if (!ENABLE_ARCH_4T) {
return false;
}
- gen_bx(s, load_reg(s, a->rm));
+ gen_bx_excret(s, load_reg(s, a->rm));
return true;
}
@@ -8433,6 +8433,26 @@ static bool trans_BLX_r(DisasContext *s, arg_BLX_r *a)
return true;
}
+static bool trans_BXNS(DisasContext *s, arg_BXNS *a)
+{
+ if (!s->v8m_secure || IS_USER_ONLY) {
+ gen_illegal_op(s);
+ } else {
+ gen_bxns(s, a->rm);
+ }
+ return true;
+}
+
+static bool trans_BLXNS(DisasContext *s, arg_BLXNS *a)
+{
+ if (!s->v8m_secure || IS_USER_ONLY) {
+ gen_illegal_op(s);
+ } else {
+ gen_blxns(s, a->rm);
+ }
+ return true;
+}
+
static bool trans_CLZ(DisasContext *s, arg_CLZ *a)
{
TCGv_i32 tmp;
@@ -10645,49 +10665,11 @@ static void disas_thumb_insn(DisasContext *s,
uint32_t insn)
}
break;
case 3:
- {
/* 0b0100_0111_xxxx_xxxx
* - branch [and link] exchange thumb register
+ * In decodetree
*/
- bool link = insn & (1 << 7);
-
- if (insn & 3) {
- goto undef;
- }
- if (link) {
- ARCH(5);
- }
- if ((insn & 4)) {
- /* BXNS/BLXNS: only exists for v8M with the
- * security extensions, and always UNDEF if NonSecure.
- * We don't implement these in the user-only mode
- * either (in theory you can use them from Secure User
- * mode but they are too tied in to system emulation.)
- */
- if (!s->v8m_secure || IS_USER_ONLY) {
- goto undef;
- }
- if (link) {
- gen_blxns(s, rm);
- } else {
- gen_bxns(s, rm);
- }
- break;
- }
- /* BLX/BX */
- tmp = load_reg(s, rm);
- if (link) {
- val = (uint32_t)s->pc | 1;
- tmp2 = tcg_temp_new_i32();
- tcg_gen_movi_i32(tmp2, val);
- store_reg(s, 14, tmp2);
- gen_bx(s, tmp);
- } else {
- /* Only BX works as exception-return, not BLX */
- gen_bx_excret(s, tmp);
- }
- break;
- }
+ goto illegal_op;
}
break;
}
diff --git a/target/arm/t16.decode b/target/arm/t16.decode
index edb67a3896..4701f72357 100644
--- a/target/arm/t16.decode
+++ b/target/arm/t16.decode
@@ -24,6 +24,7 @@
&s_rri_rot !extern s rn rd imm rot
&s_rrrr !extern s rd rn rm ra
&ri !extern rd imm
+&r !extern rm
&ldst_rr !extern p w u rn rt rm shimm shtype
&ldst_ri !extern p w u rn rt imm
&ldst_block !extern rn i b u w list
@@ -144,3 +145,12 @@ MOV_rri 00100 ... ........ @arith_1i
%s
CMP_rri 00101 ... ........ @arith_1i s=1
ADD_rri 00110 ... ........ @arith_1i %s
SUB_rri 00111 ... ........ @arith_1i %s
+
+# Branch and exchange
+
+@branchr .... .... . rm:4 ... &r
+
+BX 0100 0111 0 .... 000 @branchr
+BLX_r 0100 0111 1 .... 000 @branchr
+BXNS 0100 0111 0 .... 100 @branchr
+BLXNS 0100 0111 1 .... 100 @branchr
--
2.17.1
