On 6/6/19 12:45 PM, Peter Maydell wrote: > Convert the VSEL instructions to decodetree. > We leave trans_VSEL() in translate.c for now as this allows > the patch to show just the changes from the old handle_vsel(). > > In the old code the check for "do D16-D31 exist" was hidden in > the VFP_DREG macro, and assumed that VFPv3 always implied that > D16-D31 exist. In the new code we do the correct ID register test. > This gives identical behaviour for most of our CPUs, and fixes > previously incorrect handling for Cortex-R5F, Cortex-M4 and > Cortex-M33, which all implement VFPv3 or better with only 16 > double-precision registers. > > Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> > --- > target/arm/cpu.h | 6 ++++++ > target/arm/translate-vfp.inc.c | 9 +++++++++ > target/arm/translate.c | 35 ++++++++++++++++++++++++---------- > target/arm/vfp-uncond.decode | 19 ++++++++++++++++++ > 4 files changed, 59 insertions(+), 10 deletions(-)
Reviewed-by: Richard Henderson <richard.hender...@linaro.org> r~
