Signed-off-by: Richard Henderson <r...@twiddle.net>
---
target-alpha/translate.c | 16 +++++++++++++---
1 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 7c90ad9..c8ef31d 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -2939,14 +2939,24 @@ static ExitStatus translate_one(DisasContext *ctx,
uint32_t insn)
break;
#endif
case 0x1E:
- /* HW_REI (PALcode) */
+ /* HW_RET (PALcode) */
#if defined (CONFIG_USER_ONLY)
goto invalid_opc;
#else
if (!ctx->pal_mode)
goto invalid_opc;
- gen_helper_hw_ret(cpu_ir[rb]);
- break;
+ if (rb == 31) {
+ /* Pre-EV6 CPUs interpreted this as HW_REI, loading the return
+ address from EXC_ADDR. This turns out to be useful for our
+ emulation PALcode, so continue to accept it. */
+ TCGv tmp = tcg_temp_new();
+ tcg_gen_ld_i64(tmp, cpu_env, offsetof(CPUState, exc_addr));
+ gen_helper_hw_ret(tmp);
+ tcg_temp_free(tmp);
+ } else {
+ gen_helper_hw_ret(cpu_ir[rb]);
+ }
+ return EXIT_PC_UPDATED;
#endif
case 0x1F:
/* HW_ST (PALcode) */
--
1.7.3.4
