Based-on: <20190518190157.21255-1-richard.hender...@linaro.org> Aka "tcg: misc gvec improvements".
Version 3 was last posted in March, https://lists.gnu.org/archive/html/qemu-devel/2019-03/msg05859.html Changes since v3: * Add support for bitsel, with the vsx xxsel insn. * Rely on the new relocation overflow handling, so we don't require 3 insns for a vector load. Changes since v2: * Several generic tcg patches to improve dup vs dupi vs dupm. In particular, if a global temp (like guest r10) is not in a host register, we should duplicate from memory instead of loading to an integer register, spilling to stack, loading to a vector register, and then duplicating. * I have more confidence that 32-bit ppc host should work this time around. No testing on that front yet, but I've unified some code sequences with 64-bit ppc host. * Base altivec now supports V128 only. Moved V64 support to Power7 (v2.06), which has 64-bit load/store. * Dropped support for 64-bit vector multiply using Power8. The expansion was too large compared to using integer regs. r~ Richard Henderson (7): tcg/ppc: Initial backend support for Altivec tcg/ppc: Support vector shift by immediate tcg/ppc: Support vector multiply tcg/ppc: Support vector dup2 tcg/ppc: Update vector support to v2.06 tcg/ppc: Update vector support to v2.07 tcg/ppc: Update vector support to v3.00 tcg/ppc/tcg-target.h | 39 +- tcg/ppc/tcg-target.opc.h | 11 + tcg/ppc/tcg-target.inc.c | 1077 +++++++++++++++++++++++++++++++++++--- 3 files changed, 1063 insertions(+), 64 deletions(-) create mode 100644 tcg/ppc/tcg-target.opc.h -- 2.17.1
