On 4/16/19 5:57 AM, Peter Maydell wrote: > Correct the decode of the M-profile "coprocessor and > floating-point instructions" space: > * op0 == 0b11 is always unallocated > * if the CPU has an FPU then all insns with op1 == 0b101 > are floating point and go to disas_vfp_insn() > > For the moment we leave VLLDM and VLSTM as NOPs; in > a later commit we will fill in the proper implementation > for the case where an FPU is present. > > Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> > --- > target/arm/translate.c | 26 ++++++++++++++++++++++---- > 1 file changed, 22 insertions(+), 4 deletions(-)
Reviewed-by: Richard Henderson <richard.hender...@linaro.org> r~
