On 3/20/19 7:05 AM, Yoshinori Sato wrote:
> OK. fixed another way.
> But RX big-endian mode only data access.
> So operand value always little-endian order.
Oh that is convenient.
Therefore the operand can always be put together by pieces. E.g.
-%b4_dsp_16 0:16 !function=dsp16
-%b4_bdsp 0:24 !function=bdsp_a
+%b4_dsp16 0:s8 8:8
+%b4_dsp24 0:s8 8:8 16:8
Also note the 's' qualifier that defines signed fields.
-%b2_bdsp 16:8 !function=bdsp_b
...
-@b2_bcnd_b .... cd:4 .... .... &bcnd dsp=%b2_bdsp sz=2
-@b2_bra_b .... .... .... .... &jdsp dsp=%b2_bdsp sz=2
+@b2_bcnd_b .... cd:4 dsp:s8 &bcnd sz=2
+@b2_bra_b .... .... dsp:s8 &jdsp sz=2
>>> +/* push rs */
>>> +static bool trans_PUSH_r(DisasContext *ctx, arg_PUSH_r *a)
>>> +{
>>> + if (a->rs != 0) {
>>> + tcg_gen_subi_i32(cpu_regs[0], cpu_regs[0], 4);
>>> + rx_gen_ldst(a->sz, RX_MEMORY_ST, cpu_regs[a->rs], cpu_regs[0]);
>>> + } else {
>>> + tcg_gen_mov_i32(ctx->src, cpu_regs[a->rs]);
>>> + tcg_gen_subi_i32(cpu_regs[0], cpu_regs[0], 4);
>>> + rx_gen_ldst(a->sz, RX_MEMORY_ST, ctx->src, cpu_regs[0]);
>>> + }
>>> + return true;
>>
>> As far as I can see the THEN and ELSE cases have identical operation.
>
> It little different.
> In the case of r0, the value before decrementing is stored in memory.
> I added comment.
What I mean is that the sequence that you use for r0 could also be used for all
other rN.
I understand that RX does not have an mmu, but the normal way we handle this is
tcg_gen_subi_i32(addr, cpu_regs[0], 4);
rx_gen_st(a->sz, cpu_regs[a->rs], addr);
tcg_gen_mov_i32(cpu_regs[0], addr);
so that the stack pointer is not modified if the store raises an exception.
r~
