On Fri, Feb 22, 2019 at 05:13:37PM +0000, Mark Cave-Ayland wrote: > On 22/02/2019 05:59, Richard Henderson wrote: > > > This requires VSX, not just Altivec, so Power7 or later. > > > > Signed-off-by: Richard Henderson <richard.hender...@linaro.org> > > --- > > > > At present there are no tunables that can avoid the 64-bit element > > load/store requirement. As with requiring AVX1 for x86 hosts, I'm > > not sure it's worth inventing such a tunable for pre-power7 hosts. > > > > Tested vs aarch64 risu test cases. It's probably worth testing > > this vs Mark's target/ppc conversion. > > Oooh this looks really exciting! However... I only have a G4 Mac Mini around > that I > use for testing which is Altivec-only :( Is it much work to support > non-VSX hosts?
I have access to POWER8 and POWER9 machines, but I haven't worked with
RISU before. If you can give me a straightforward recipe I can try
running the tests.
>
> This leads me to a related point that came up when Howard and I were testing
> the PPC
> vector patches - how do we know at runtime which optimisations were being
> used, e.g.
> what is the value of have_avx2 on a particular CPU running QEMU?
>
> Under Linux this isn't too bad since you can just do "cat /proc/cpuinfo |
> grep avx2"
> but it becomes more tricky when getting bug reports from Windows users who
> aren't
> particularly technical...
>
>
> ATB,
>
> Mark.
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
signature.asc
Description: PGP signature
