On 1/21/19 10:51 AM, Peter Maydell wrote: > For the IoTKit the SRAM bank size is always 32K (15 bits); for the > SSE-200 this is a configurable parameter, which defaults to 32K but > can be changed when it is built into a particular SoC. For instance > the Musca-B1 board sets it to 128K (17 bits). > > Make the bank size a QOM property. We follow the SSE-200 hardware in > naming the parameter SRAM_ADDR_WIDTH, which specifies the number of > address bits of a single SRAM bank. > > Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> > --- > include/hw/arm/armsse.h | 1 + > hw/arm/armsse.c | 18 ++++++++++++++++-- > 2 files changed, 17 insertions(+), 2 deletions(-)
Reviewed-by: Richard Henderson <richard.hender...@linaro.org> r~