On 17/12/2018 16:46, Richard Henderson wrote:
> On 12/17/18 4:24 AM, Mark Cave-Ayland wrote:
>> During review of the previous patch, Richard pointed out an existing bug that
>> the writeback to the avr{l,h} registers should be delayed until after any
>> exceptions have been raised.
>>
>> Perform both 64-bit loads into separate temporaries and then write them into
>> the avr{l,h} registers together to ensure that this is always the case.
>>
>> Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
>> ---
>> target/ppc/translate/vmx-impl.inc.c | 24 +++++++++++++-----------
>> 1 file changed, 13 insertions(+), 11 deletions(-)
>
> I feel a bit silly. There was no bug, since the address is forced to be
> aligned on a 16-byte boundary. The second memory access will be to the same
> page and cannot trap.
>
> That said, I think the cleanup looks good.
>
> Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Ah okay. I'm inclined to drop this patch for now, since it feels strange
introducing
a cleanup to just one of the load functions...
ATB,
Mark.
