This patchset fixes the last serious bug in our implementation of Hyp mode (aka EL2 for AArch32), and turns the feature bit on for the Cortex-A7 and Cortex-A15 CPUs.
The bug is that Hyp mode is an exception to the previous general rule that every AArch32 mode (except SYS, which always shares with USR) has its own banked r13, r14 and SPSR. Instead Hyp has a banked r13 and SPSR, but r14 is shared with USR and SYS. We were accidentally implementing it as banked, which results in remarkably nonobvious failure modes. With this fix, I can boot an AArch32 guest that uses KVM to boot an AArch32 nested guest, and I can also boot an L4Re/ Fiasco guest successfully. Not entirely sure what to do about this for 3.1 -- maybe put in the bugfix patch but hold off on actually setting the feature bit til 4.0? thanks -- PMM Peter Maydell (2): target/arm: Hyp mode R14 is shared with User and System target/arm/cpu: Give Cortex-A15 and -A7 the EL2 feature target/arm/internals.h | 16 ++++++++++++++++ target/arm/cpu.c | 2 ++ target/arm/helper.c | 29 +++++++++++++++-------------- target/arm/kvm32.c | 4 ++-- target/arm/op_helper.c | 2 +- 5 files changed, 36 insertions(+), 17 deletions(-) -- 2.19.1
