On Fri, Oct 12, 2018 at 6:58 PM Aleksandar Markovic <aleksandar.marko...@rt-rk.com> wrote: > > From: Stefan Markovic <smarko...@wavecomp.com> > > Add field corresponding to CP0 Config2 to DisasContext. This is > needed for availability control via Config2 bits. > > Signed-off-by: Stefan Markovic <smarko...@wavecomp.com> > Signed-off-by: Aleksandar Markovic <amarko...@wavecomp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org> > --- > target/mips/translate.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/target/mips/translate.c b/target/mips/translate.c > index e7bc3d4..9e4aae5 100644 > --- a/target/mips/translate.c > +++ b/target/mips/translate.c > @@ -1449,6 +1449,7 @@ typedef struct DisasContext { > uint32_t opcode; > int insn_flags; > int32_t CP0_Config1; > + int32_t CP0_Config2; > int32_t CP0_Config3; > int32_t CP0_Config5; > /* Routine used to access memory */ > @@ -25517,6 +25518,7 @@ static void > mips_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) > ctx->saved_pc = -1; > ctx->insn_flags = env->insn_flags; > ctx->CP0_Config1 = env->CP0_Config1; > + ctx->CP0_Config2 = env->CP0_Config2; > ctx->CP0_Config3 = env->CP0_Config3; > ctx->CP0_Config5 = env->CP0_Config5; > ctx->btarget = 0; > -- > 2.7.4 > >