From: Stefan Markovic <smarko...@wavecomp.com>
Add DSP R3 ASE related bit definition for insn_flags and hflags.
Reviewed-by: Aleksandar Markovic <amarko...@wavecomp.com>
Signed-off-by: Stefan Markovic <smarko...@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarko...@wavecomp.com>
---
target/mips/cpu.h | 1 +
target/mips/mips-defs.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index dc0122d..f07b94e 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -624,6 +624,7 @@ struct CPUMIPSState {
/* MIPS DSP resources access. */
#define MIPS_HFLAG_DSP 0x080000 /* Enable access to MIPS DSP resources. */
#define MIPS_HFLAG_DSPR2 0x100000 /* Enable access to MIPS DSPR2 resources. */
+#define MIPS_HFLAG_DSPR3 0x20000000 /* Enable access to MIPS DSPR3 resources.*/
/* Extra flag about HWREna register. */
#define MIPS_HFLAG_HWRENA_ULR 0x200000 /* ULR bit from HWREna is set. */
#define MIPS_HFLAG_SBRI 0x400000 /* R6 SDBBP causes RI excpt. in user mode */
diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h
index c8e9979..b27b7ae 100644
--- a/target/mips/mips-defs.h
+++ b/target/mips/mips-defs.h
@@ -47,6 +47,7 @@
#define ASE_MDMX 0x00040000
#define ASE_DSP 0x00080000
#define ASE_DSPR2 0x00100000
+#define ASE_DSPR3 0x02000000
#define ASE_MT 0x00200000
#define ASE_SMARTMIPS 0x00400000
#define ASE_MICROMIPS 0x00800000
--
2.7.4
