Add some non-volatile memories and a non-volatile memory controller for the nRF51. Furthermore, a testsuite for the bbc:microbit and nrf51 soc was added.
Examination of the real device showed that NVMs remained unchanged when the write/erase enabled bits are not set in the controller, so we can safely ignore all writes. More: https://github.com/douzepouze/gsoc18-qemu/blob/master/notes.md#test-nvmc-behavior-out-of-micropython-repl The CODE/FLASH NVM is not currently included in this peripheral. It is hosted in the SOC and must be read-only to provide an accurate model. Steffen Görtz (2): arm: Add NRF51 SOC non-volatile memory controller tests: Add bbc:microbit / nRF51 test suite hw/nvram/Makefile.objs | 1 + hw/nvram/nrf51_nvm.c | 401 +++++++++++++++++++++++++++++++++++ include/hw/arm/nrf51_soc.h | 2 +- include/hw/nvram/nrf51_nvm.h | 56 +++++ tests/Makefile.include | 2 + tests/microbit-test.c | 118 +++++++++++ 6 files changed, 579 insertions(+), 1 deletion(-) create mode 100644 hw/nvram/nrf51_nvm.c create mode 100644 include/hw/nvram/nrf51_nvm.h create mode 100644 tests/microbit-test.c -- 2.18.0
