On Thu, Apr 26, 2018 at 11:18 AM, Thomas Huth <th...@redhat.com> wrote: > On 26.04.2018 18:09, Alex Bennée wrote: >> Thomas Huth <th...@redhat.com> writes: >>> Actually, with certain CPUs, you can really use the "none" machine as a >>> pure instruction set testing system. For example, on m68k, there used to >>> be an explicit "dummy" machine for this job, and we removed it in favour >>> of the "none" machine: >>> >>> https://git.qemu.org/?p=qemu.git;a=commitdiff;h=22f2dbe7eaf3e12e38c9c210 >> >> Ahh OK. Do you know what other CPUs can be used in this way? > > I think it should be possible with at least all the boards that have a > "sim" machine, e.g. xtensa, mips, moxie and openrisc.
xtensa sim machine is a bit more than just instruction simulator: it instantiates CPU-configuration-specific local memories. It is meant to be compatible with Xtensa ISS from Xtensa development tools. -- Thanks. -- Max
