https://git.qemu.org/?p=qemu.git;a=commitdiff;h=6670b494fdb23f74ecd9b
** Changed in: qemu Status: In Progress => Fix Committed -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1760262 Title: cmsdk-apb-uart doesn't appear to clear interrupt flags Status in QEMU: Fix Committed Bug description: I have been writing a small operating system and using QEMU emulating the mps2-an385 board for some of my testing. During development of the uart driver I observed some odd behaviour with the TX interrupt -- writing a '1' to bit 0 of the INTCLEAR register doesn't clear the TX interrupt flag, and the interrupt fires continuously. It's possible that I have an error somewhere in my code, but after inspecting the QEMU source it does appear to be a QEMU bug. I applied the following patch and it solved my issue: From 9875839c144fa60a3772f16ae44d32685f9328aa Mon Sep 17 00:00:00 2001 From: Patrick Oppenlander <patrick.oppenlan...@gmail.com> Date: Sat, 31 Mar 2018 15:10:28 +1100 Subject: [PATCH] hw/char/cmsdk-apb-uart: fix clearing of interrupt flags --- hw/char/cmsdk-apb-uart.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/char/cmsdk-apb-uart.c b/hw/char/cmsdk-apb-uart.c index 1ad1e14295..64991bd9d7 100644 --- a/hw/char/cmsdk-apb-uart.c +++ b/hw/char/cmsdk-apb-uart.c @@ -274,6 +274,7 @@ static void uart_write(void *opaque, hwaddr offset, uint64_t value, * is then reflected into the intstatus value by the update function). */ s->state &= ~(value & (R_INTSTATUS_TXO_MASK | R_INTSTATUS_RXO_MASK)); + s->intstatus &= ~(value & ~(R_INTSTATUS_TXO_MASK | R_INTSTATUS_RXO_MASK)); cmsdk_apb_uart_update(s); break; case A_BAUDDIV: -- 2.16.2 To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1760262/+subscriptions