On 03/09/2018 05:12 AM, Michael Clark wrote:
> This makes 'qemu-system-riscv64 -machine help' output more tidy
> and consistent.
>
> Cc: Sagar Karandikar <sag...@eecs.berkeley.edu>
> Cc: Bastian Koppelmann <kbast...@mail.uni-paderborn.de>
> Signed-off-by: Michael Clark <m...@sifive.com>
> Signed-off-by: Palmer Dabbelt <pal...@sifive.com>
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org>
> ---
> hw/riscv/virt.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> index a402856..0055439 100644
> --- a/hw/riscv/virt.c
> +++ b/hw/riscv/virt.c
> @@ -404,7 +404,7 @@ static const TypeInfo riscv_virt_board_device = {
>
> static void riscv_virt_board_machine_init(MachineClass *mc)
> {
> - mc->desc = "RISC-V VirtIO Board (Privileged spec v1.10)";
> + mc->desc = "RISC-V VirtIO Board (Privileged ISA v1.10)";
> mc->init = riscv_virt_board_init;
> mc->max_cpus = 8; /* hardcoded limit in BBL */
> }
>
