Based on PMM's target-arm.next branch, which now has most of v2. While looking again at ZCR_ELx, I think that there's an existing bug in the FPCR/FPSR system registers, wherein we do not have an access function for when the FPU is disabled.
r~ Richard Henderson (5): target/arm: Expand vector registers for SVE target/arm: Add predicate registers for SVE target/arm: Add SVE to migration state target/arm: Add ZCR_ELx target/arm: Add SVE state to TB->FLAGS target/arm/cpu.h | 84 ++++++++++++++++++------ target/arm/translate.h | 2 + target/arm/helper.c | 156 ++++++++++++++++++++++++++++++++++++++++++++- target/arm/machine.c | 88 ++++++++++++++++++++++++- target/arm/translate-a64.c | 10 +-- target/arm/translate.c | 7 +- 6 files changed, 318 insertions(+), 29 deletions(-) -- 2.14.3
