On 18 December 2017 at 17:30, Richard Henderson
<richard.hender...@linaro.org> wrote:
> Helpers that return a pointer into env->vfp.regs so that we isolate
> the logic of how to index the regs array for different cpu modes.
>
> Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -64,15 +64,16 @@ static int vfp_gdb_get_reg(CPUARMState *env, uint8_t
> *buf, int reg)
> /* VFP data registers are always little-endian. */
> nregs = arm_feature(env, ARM_FEATURE_VFP3) ? 32 : 16;
> if (reg < nregs) {
> - stfq_le_p(buf, env->vfp.regs[reg]);
> + stfq_le_p(buf, *aa32_vfp_dreg(env, reg));
> return 8;
> }
> if (arm_feature(env, ARM_FEATURE_NEON)) {
> /* Aliases for Q regs. */
> nregs += 16;
> if (reg < nregs) {
> - stfq_le_p(buf, env->vfp.regs[(reg - 32) * 2]);
> - stfq_le_p(buf + 8, env->vfp.regs[(reg - 32) * 2 + 1]);
> + uint64_t *q = aa32_vfp_dreg(env, (reg - 32) * 2);
> + stfq_le_p(buf, q[0]);
> + stfq_le_p(buf + 8, q[1]);
> return 16;
> }
> }
> @@ -90,14 +91,15 @@ static int vfp_gdb_set_reg(CPUARMState *env, uint8_t
> *buf, int reg)
>
> nregs = arm_feature(env, ARM_FEATURE_VFP3) ? 32 : 16;
> if (reg < nregs) {
> - env->vfp.regs[reg] = ldfq_le_p(buf);
> + *aa32_vfp_dreg(env, reg) = ldfq_le_p(buf);
> return 8;
> }
> if (arm_feature(env, ARM_FEATURE_NEON)) {
> nregs += 16;
> if (reg < nregs) {
> - env->vfp.regs[(reg - 32) * 2] = ldfq_le_p(buf);
> - env->vfp.regs[(reg - 32) * 2 + 1] = ldfq_le_p(buf + 8);
> + uint64_t *q = aa32_vfp_dreg(env, (reg - 32) * 2);
> + q[0] = ldfq_le_p(buf);
> + q[1] = ldfq_le_p(buf + 8);
> return 16;
> }
> }
After reading patch 7 I came back to this one. I wonder if these two
(which I think are the only ones) justify an aa32_vfp_qreg() ?
thanks
-- PMM
