On 12/01/2017 03:44 PM, Peter Maydell wrote: > The TT instruction is going to need to look up the MMU index > for a specified security and privilege state. Refactor the > existing arm_v7m_mmu_idx_for_secstate() into a version that > lets you specify the privilege state and one that uses the > current state of the CPU. > > Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org> > --- > target/arm/cpu.h | 21 ++++++++++++++++----- > 1 file changed, 16 insertions(+), 5 deletions(-) > > diff --git a/target/arm/cpu.h b/target/arm/cpu.h > index d228fe6..1f414fd 100644 > --- a/target/arm/cpu.h > +++ b/target/arm/cpu.h > @@ -2334,14 +2334,16 @@ static inline int arm_mmu_idx_to_el(ARMMMUIdx mmu_idx) > } > } > > -/* Return the MMU index for a v7M CPU in the specified security state */ > -static inline ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env, > - bool secstate) > +/* Return the MMU index for a v7M CPU in the specified security and > + * privilege state > + */ > +static inline ARMMMUIdx arm_v7m_mmu_idx_for_secstate_and_priv(CPUARMState > *env, > + bool secstate, > + bool priv) > { > - int el = arm_current_el(env); > ARMMMUIdx mmu_idx = ARM_MMU_IDX_M; > > - if (el != 0) { > + if (priv) { > mmu_idx |= 1; > } > > @@ -2356,6 +2358,15 @@ static inline ARMMMUIdx > arm_v7m_mmu_idx_for_secstate(CPUARMState *env, > return mmu_idx; > } > > +/* Return the MMU index for a v7M CPU in the specified security state */ > +static inline ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env, > + bool secstate) > +{ > + bool priv = arm_current_el(env) != 0; > + > + return arm_v7m_mmu_idx_for_secstate_and_priv(env, secstate, priv); > +} > + > /* Determine the current mmu_idx to use for normal loads/stores */ > static inline int cpu_mmu_index(CPUARMState *env, bool ifetch) > { >