On 12/01/2017 03:44 PM, Peter Maydell wrote:
> For v8M it is possible for the CONTROL.SPSEL bit value and the
> current stack to be out of sync. This means we need to update
> the checks used in reads and writes of the PSP and MSP special
> registers to use v7m_using_psp() rather than directly checking
> the SPSEL bit in the control register.
good catch.
>
> Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org>
> ---
> target/arm/helper.c | 10 ++++------
> 1 file changed, 4 insertions(+), 6 deletions(-)
>
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index 91a9300..88394d4 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -9953,11 +9953,9 @@ uint32_t HELPER(v7m_mrs)(CPUARMState *env, uint32_t
> reg)
>
> switch (reg) {
> case 8: /* MSP */
> - return (env->v7m.control[env->v7m.secure] &
> R_V7M_CONTROL_SPSEL_MASK) ?
> - env->v7m.other_sp : env->regs[13];
> + return v7m_using_psp(env) ? env->v7m.other_sp : env->regs[13];
> case 9: /* PSP */
> - return (env->v7m.control[env->v7m.secure] &
> R_V7M_CONTROL_SPSEL_MASK) ?
> - env->regs[13] : env->v7m.other_sp;
> + return v7m_using_psp(env) ? env->regs[13] : env->v7m.other_sp;
> case 16: /* PRIMASK */
> return env->v7m.primask[env->v7m.secure];
> case 17: /* BASEPRI */
> @@ -10059,14 +10057,14 @@ void HELPER(v7m_msr)(CPUARMState *env, uint32_t
> maskreg, uint32_t val)
> }
> break;
> case 8: /* MSP */
> - if (env->v7m.control[env->v7m.secure] & R_V7M_CONTROL_SPSEL_MASK) {
> + if (v7m_using_psp(env)) {
> env->v7m.other_sp = val;
> } else {
> env->regs[13] = val;
> }
> break;
> case 9: /* PSP */
> - if (env->v7m.control[env->v7m.secure] & R_V7M_CONTROL_SPSEL_MASK) {
> + if (v7m_using_psp(env)) {
> env->regs[13] = val;
> } else {
> env->v7m.other_sp = val;
>
