On 22/08/2017 16:44, Brijesh Singh wrote:
> Hi Eduardo and Paolo,
>
> Please let me know if want me to address something else in this patch.
>
> After this patch is accepted, I am planning to submit similar patch to
> to libvirt to create EPYC CPU.
It looks good to me, but Eduardo is the maintainer and may spot
something missing. :)
QEMU is now in freeze, but the patch can easily go in at the beginning
of 2.11.
Paolo
> - Brijesh
>
> On 08/15/2017 12:00 PM, Brijesh Singh wrote:
>> Add a new base CPU model called 'EPYC' to model processors from AMD EPYC
>> family (which includes EPYC 76xx,75xx,74xx, 73xx and 72xx).
>>
>> The following features bits have been added/removed compare to Opteron_G5
>>
>> Added: monitor, movbe, rdrand, mmxext, ffxsr, rdtscp, cr8legacy, osvw,
>> fsgsbase, bmi1, avx2, smep, bmi2, rdseed, adx, smap, clfshopt,
>> sha
>> xsaveopt, xsavec, xgetbv1, arat
>>
>> Removed: xop, fma4, tbm
>>
>> Cc: Paolo Bonzini <pbonz...@redhat.com>
>> Cc: Richard Henderson <r...@twiddle.net>
>> Cc: Eduardo Habkost <ehabk...@redhat.com>
>> Cc: Tom Lendacky <thomas.lenda...@amd.com>
>> Signed-off-by: Brijesh Singh <brijesh.si...@amd.com>
>> ---
>>
>> Changes since v2:
>> * limit the xlevel to 0x8000000a
>>
>> Changes since v1:
>> * fix typo EYPC -> EPYC to reflect the correct branding name
>>
>> target/i386/cpu.c | 44 ++++++++++++++++++++++++++++++++++++++++++++
>> 1 file changed, 44 insertions(+)
>>
>> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
>> index ddc45ab..6617e01 100644
>> --- a/target/i386/cpu.c
>> +++ b/target/i386/cpu.c
>> @@ -1522,6 +1522,50 @@ static X86CPUDefinition builtin_x86_defs[] = {
>> .xlevel = 0x8000001A,
>> .model_id = "AMD Opteron 63xx class CPU",
>> },
>> + {
>> + .name = "EPYC",
>> + .level = 0xd,
>> + .vendor = CPUID_VENDOR_AMD,
>> + .family = 23,
>> + .model = 1,
>> + .stepping = 2,
>> + .features[FEAT_1_EDX] =
>> + CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
>> CPUID_CLFLUSH |
>> + CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
>> CPUID_PGE |
>> + CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
>> CPUID_MCE |
>> + CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE | CPUID_DE |
>> + CPUID_VME | CPUID_FP87,
>> + .features[FEAT_1_ECX] =
>> + CPUID_EXT_RDRAND | CPUID_EXT_F16C | CPUID_EXT_AVX |
>> + CPUID_EXT_XSAVE | CPUID_EXT_AES | CPUID_EXT_POPCNT |
>> + CPUID_EXT_MOVBE | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 |
>> + CPUID_EXT_CX16 | CPUID_EXT_FMA | CPUID_EXT_SSSE3 |
>> + CPUID_EXT_MONITOR | CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3,
>> + .features[FEAT_8000_0001_EDX] =
>> + CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_PDPE1GB |
>> + CPUID_EXT2_FFXSR | CPUID_EXT2_MMXEXT | CPUID_EXT2_NX |
>> + CPUID_EXT2_SYSCALL,
>> + .features[FEAT_8000_0001_ECX] =
>> + CPUID_EXT3_OSVW | CPUID_EXT3_3DNOWPREFETCH |
>> + CPUID_EXT3_MISALIGNSSE | CPUID_EXT3_SSE4A | CPUID_EXT3_ABM |
>> + CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM,
>> + .features[FEAT_7_0_EBX] =
>> + CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
>> CPUID_7_0_EBX_AVX2 |
>> + CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_BMI2 |
>> CPUID_7_0_EBX_RDSEED |
>> + CPUID_7_0_EBX_ADX | CPUID_7_0_EBX_SMAP |
>> CPUID_7_0_EBX_CLFLUSHOPT |
>> + CPUID_7_0_EBX_SHA_NI,
>> + /* Missing: XSAVES (not supported by some Linux versions,
>> + * including v4.1 to v4.12).
>> + * KVM doesn't yet expose any XSAVES state save component.
>> + */
>> + .features[FEAT_XSAVE] =
>> + CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC |
>> + CPUID_XSAVE_XGETBV1,
>> + .features[FEAT_6_EAX] =
>> + CPUID_6_EAX_ARAT,
>> + .xlevel = 0x8000000A,
>> + .model_id = "AMD EPYC Processor",
>> + },
>> };
>> typedef struct PropValue {
>>
