On Mon, Jul 24, 2017 at 09:07:19PM +1000, Benjamin Herrenschmidt wrote: > On Mon, 2017-07-24 at 19:50 +1000, David Gibson wrote: > > On Mon, Jul 24, 2017 at 05:00:57PM +1000, Benjamin Herrenschmidt wrote: > > > On Mon, 2017-07-24 at 14:36 +1000, David Gibson wrote: > > > > On Wed, Jul 05, 2017 at 07:13:21PM +0200, Cédric Le Goater wrote: > > > > > These flags define some characteristics of the source : > > > > > > > > > > - XIVE_SRC_H_INT_ESB the Event State Buffer are controlled with a > > > > > specific hcall H_INT_ESB > > > > > > > > What's the other option? > > > > > > Direct MMIO access. Normally all interrupts use normal MMIOs, > > > each interrupts has an associated MMIO page with special MMIOs > > > to control the source state (PQ bits). This is something I added > > > to the PAPR spec (and the OPAL <-> Linux interface) to allow firmware > > > to work around broken HW (which happens on some P9 versions). > > > > Ok.. and that's something that can be decided at runtime? > > Well, at this point I think nothing will set that flag.... It's there > for workaround around HW bugs on some chips. At least in full emu it > shouldn't happen unless we try to emulate those bugs. Hopefully direct > MMIO will just work.
Hm. That doesn't seem like a good match for a per-irq state
structure.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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