On Mon, 2017-07-24 at 14:36 +1000, David Gibson wrote:
> On Wed, Jul 05, 2017 at 07:13:21PM +0200, Cédric Le Goater wrote:
> > These flags define some characteristics of the source :
> >
> > - XIVE_SRC_H_INT_ESB the Event State Buffer are controlled with a
> > specific hcall H_INT_ESB
>
> What's the other option?
Direct MMIO access. Normally all interrupts use normal MMIOs,
each interrupts has an associated MMIO page with special MMIOs
to control the source state (PQ bits). This is something I added
to the PAPR spec (and the OPAL <-> Linux interface) to allow firmware
to work around broken HW (which happens on some P9 versions).
> > - XIVE_SRC_LSI LSI or MSI source
>
> Hrm. This definitely duplicates info that is in the XICS per irq
> state which you're re-using (and which you're using in the xive code
> at this point).
I think all those flags correspond to the flags passed via the PAPR
API, so it makes sense to have them there.
> > - XIVE_SRC_TRIGGER the full function page supports trigger
> > - XIVE_SRC_STORE_EOI EOI can with a store.
> >
> > Signed-off-by: Cédric Le Goater <c...@kaod.org>
> > ---
> > hw/intc/xive.c | 1 +
> > include/hw/ppc/xive.h | 9 +++++++++
> > 2 files changed, 10 insertions(+)
> >
> > diff --git a/hw/intc/xive.c b/hw/intc/xive.c
> > index 816031b8ac81..8f8bb8b787bd 100644
> > --- a/hw/intc/xive.c
> > +++ b/hw/intc/xive.c
> > @@ -345,6 +345,7 @@ static Property xive_ics_properties[] = {
> > DEFINE_PROP_UINT32("nr-irqs", ICSState, nr_irqs, 0),
> > DEFINE_PROP_UINT32("irq-base", ICSState, offset, 0),
> > DEFINE_PROP_UINT32("shift", XiveICSState, esb_shift, 0),
> > + DEFINE_PROP_UINT64("flags", XiveICSState, flags, 0),
> > DEFINE_PROP_END_OF_LIST(),
> > };
> >
> > diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h
> > index 5303d96f5f59..1178300c9df3 100644
> > --- a/include/hw/ppc/xive.h
> > +++ b/include/hw/ppc/xive.h
> > @@ -30,9 +30,18 @@ typedef struct XiveICSState XiveICSState;
> > #define TYPE_ICS_XIVE "xive-source"
> > #define ICS_XIVE(obj) OBJECT_CHECK(XiveICSState, (obj), TYPE_ICS_XIVE)
> >
> > +/*
> > + * XIVE Interrupt source flags
> > + */
> > +#define XIVE_SRC_H_INT_ESB (1ull << (63 - 60))
> > +#define XIVE_SRC_LSI (1ull << (63 - 61))
> > +#define XIVE_SRC_TRIGGER (1ull << (63 - 62))
> > +#define XIVE_SRC_STORE_EOI (1ull << (63 - 63))
> > +
> > struct XiveICSState {
> > ICSState parent_obj;
> >
> > + uint64_t flags;
> > uint32_t esb_shift;
> > MemoryRegion esb_iomem;
> >
>
>
