Here is v5 of the pcie patch series.
I hope I addressed the blockers.
On uncorrectable error status register in pcie_aer_write_config().
The register is RW1CS, so making it writable and test-and-clear doesn't
work.
new patches: 1, 2,
updasted patches except trivial change: 4, 7, 8
BTW, as 0.13 is released, any chance to sync pci branch with
the upstream by requesting pull?
Patch description:
This patch series implements pcie port switch emulators
which is basic part for pcie/q35 support.
This is for mst/pci tree.
change v4 -> v5:
- introduced pci_xxx_test_and_clear/set_mask
- eliminated xxx_notify(msi_trigger, int_level)
- eliminated FLR bits.
FLR will be addressed at the next phase.
changes v3 -> v4:
- introduced new pci config helper functions.(clear set bit)
- various clean up and some bug fixes.
- dropped pci_shift_xxx().
- dropped function pointerin pcie_aer.h
- dropped pci_exp_cap(), pcie_aer_cap().
- file rename (pcie_{root, upstream, downsatrem} => ioh33420, x3130).
changes v2 -> v3:
- msi: improved commant and simplified shift/ffs dance
- pci w1c config register framework
- split pcie.[ch] into pcie_regs.h, pcie.[ch] and pcie_aer.[ch]
- pcie, aer: many changes by following reviews.
changes v1 -> v2:
- update msi
- dropped already pushed out patches.
- added msix patches.
Isaku Yamahata (14):
pci: introduce helper functions to test-and-{clear, set} mask in
configuration space
pci: introduce helper function to handle msi-x and msi.
pci: use pci_word_test_and_clear_mask() in pci_device_reset()
pci/bridge: fix pci_bridge_reset()
msi: implements msi
pcie: add pcie constants to pcie_regs.h
pcie: helper functions for pcie capability and extended capability
pcie/aer: helper functions for pcie aer capability
pcie port: define struct PCIEPort/PCIESlot and helper functions
ioh3420: pcie root port in X58 ioh
x3130: pcie upstream port
x3130: pcie downstream port
pcie/hotplug: introduce pushing attention button command
pcie/aer: glue aer error injection into qemu monitor
Makefile.objs | 4 +-
hw/ioh3420.c | 229 +++++++++++++
hw/ioh3420.h | 10 +
hw/msi.c | 352 +++++++++++++++++++
hw/msi.h | 41 +++
hw/pci.c | 24 ++-
hw/pci.h | 88 +++++-
hw/pci_bridge.c | 57 +++-
hw/pci_bridge.h | 2 +
hw/pcie.c | 540 +++++++++++++++++++++++++++++
hw/pcie.h | 113 ++++++
hw/pcie_aer.c | 869 +++++++++++++++++++++++++++++++++++++++++++++++
hw/pcie_aer.h | 105 ++++++
hw/pcie_port.c | 198 +++++++++++
hw/pcie_port.h | 51 +++
hw/pcie_regs.h | 154 +++++++++
hw/xio3130_downstream.c | 197 +++++++++++
hw/xio3130_downstream.h | 11 +
hw/xio3130_upstream.c | 181 ++++++++++
hw/xio3130_upstream.h | 10 +
qemu-common.h | 6 +
qemu-monitor.hx | 36 ++
sysemu.h | 9 +
23 files changed, 3272 insertions(+), 15 deletions(-)
create mode 100644 hw/ioh3420.c
create mode 100644 hw/ioh3420.h
create mode 100644 hw/msi.c
create mode 100644 hw/msi.h
create mode 100644 hw/pcie.c
create mode 100644 hw/pcie.h
create mode 100644 hw/pcie_aer.c
create mode 100644 hw/pcie_aer.h
create mode 100644 hw/pcie_port.c
create mode 100644 hw/pcie_port.h
create mode 100644 hw/pcie_regs.h
create mode 100644 hw/xio3130_downstream.c
create mode 100644 hw/xio3130_downstream.h
create mode 100644 hw/xio3130_upstream.c
create mode 100644 hw/xio3130_upstream.h
