On 16 February 2017 at 16:35, Peter Maydell <peter.mayd...@linaro.org> wrote: > This patchset is the revamp of the NVIC code from Michael > Davidsaver's patchset of a year ago. > > Despite some superficial similarities of register layout, the > M-profile NVIC is really very different from the A-profile GIC. Our > current attempt to reuse the GIC code means that we have significant > bugs in our NVIC. The series pulls the NVIC apart from the GIC code > (fixing a few accidental bugs in the process), and then once it has a > place to stand, implements a few minor cleanups, a key bugfix > (getting priority calculations and masking right) and a missing > feature (escalation to HardFault). > > For testing, I have used the Stellaris image I have to hand: > http://people.linaro.org/~peter.maydell/stellaris.tgz > and also a set of bare-metal test programs also written by > Michael. You can find my slightly tweaked and cleand up > version of those here (a README explains how to run them): > https://git.linaro.org/people/peter.maydell/m-profile-tests.git
PS: git branch of this v2 patchset at https://git.linaro.org/people/peter.maydell/qemu-arm.git nvic-rewrite (includes squashed-in fix to patch 3). thanks -- PMM
