On 2017年02月03日 16:22, Peter Xu wrote:
From: Aviv Ben-David <bd.a...@gmail.com>

This capability asks the guest to invalidate cache before each map operation.
We can use this invalidation to trap map operations in the hypervisor.

Signed-off-by: Aviv Ben-David <bd.a...@gmail.com>
[peterx: using "caching-mode" instead of "cache-mode" to align with spec]
[peterx: re-write the subject to make it short and clear]
Signed-off-by: Peter Xu <pet...@redhat.com>
---

Reviewed-by: Jason Wang <jasow...@redhat.com>

  hw/i386/intel_iommu.c          | 5 +++++
  hw/i386/intel_iommu_internal.h | 1 +
  include/hw/i386/intel_iommu.h  | 2 ++
  3 files changed, 8 insertions(+)

diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 3270fb9..50251c3 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -2115,6 +2115,7 @@ static Property vtd_properties[] = {
      DEFINE_PROP_ON_OFF_AUTO("eim", IntelIOMMUState, intr_eim,
                              ON_OFF_AUTO_AUTO),
      DEFINE_PROP_BOOL("x-buggy-eim", IntelIOMMUState, buggy_eim, false),
+    DEFINE_PROP_BOOL("caching-mode", IntelIOMMUState, caching_mode, FALSE),
      DEFINE_PROP_END_OF_LIST(),
  };
@@ -2496,6 +2497,10 @@ static void vtd_init(IntelIOMMUState *s)
          s->ecap |= VTD_ECAP_DT;
      }
+ if (s->caching_mode) {
+        s->cap |= VTD_CAP_CM;
+    }
+
      vtd_reset_context_cache(s);
      vtd_reset_iotlb(s);
diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h
index 356f188..4104121 100644
--- a/hw/i386/intel_iommu_internal.h
+++ b/hw/i386/intel_iommu_internal.h
@@ -202,6 +202,7 @@
  #define VTD_CAP_MAMV                (VTD_MAMV << 48)
  #define VTD_CAP_PSI                 (1ULL << 39)
  #define VTD_CAP_SLLPS               ((1ULL << 34) | (1ULL << 35))
+#define VTD_CAP_CM                  (1ULL << 7)
/* Supported Adjusted Guest Address Widths */
  #define VTD_CAP_SAGAW_SHIFT         8
diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h
index 405c9d1..fe645aa 100644
--- a/include/hw/i386/intel_iommu.h
+++ b/include/hw/i386/intel_iommu.h
@@ -257,6 +257,8 @@ struct IntelIOMMUState {
      uint8_t womask[DMAR_REG_SIZE];  /* WO (write only - read returns 0) */
      uint32_t version;
+ bool caching_mode; /* RO - is cap CM enabled? */
+
      dma_addr_t root;                /* Current root table pointer */
      bool root_extended;             /* Type of root table (extended or not) */
      bool dmar_enabled;              /* Set if DMA remapping is enabled */


Reply via email to