Hi,
This is a quick update to the series I posted at the end of last week.
It mostly adds a bunch of review tags. There are two changes of note:
cputlb and arm/sparc targets: convert mmuidx flushes...
This has been updated to reduce the churn of the previous iteration
by doing all the MMUIdx shifting in-situ for the tlb_flush calls.
And:
tcg: enable MTTCG by default for ARM on x86 hosts
Mostly cosmetic tweaks but I have clarified the semantics of the
TCG_MO_foo declarations with a tweak to the TCG_TARGET_DEFAULT_MO on
x86 to be (TCG_MO_ALL & ~TCG_MO_ST_LD).
>From v8 rth said:
"As far as I'm concerned, I'm done with my review and this can go in."
So this is really your last chance to raise any concerns or questions
before the merge (although of course bug fixes can go in later ;-).
Peter,
The patches that touch ARM and that could do with maintainer sign-off are:
tcg: enable MTTCG by default for ARM on x86 hosts
target-arm: ensure all cross vCPUs TLB flushes complete
target-arm: introduce ARM_CP_EXIT_PC
target-arm/cpu.h: make ARM_CP defined consistent
target-arm: don't generate WFE/YIELD calls for MTTCG
target-arm/powerctl: defer cpu reset work to CPU context
cputlb and arm/sparc targets: convert mmuidx flushes from varg to bitmap
tcg: drop global lock during TCG code execution
Cheers,
Alex Bennée (19):
docs: new design document multi-thread-tcg.txt
tcg: move TCG_MO/BAR types into own file
tcg: add kick timer for single-threaded vCPU emulation
tcg: rename tcg_current_cpu to tcg_current_rr_cpu
tcg: remove global exit_request
tcg: enable tb_lock() for SoftMMU
tcg: enable thread-per-vCPU
cputlb: add assert_cpu_is_self checks
cputlb: tweak qemu_ram_addr_from_host_nofail reporting
cputlb and arm/sparc targets: convert mmuidx flushes from varg to
bitmap
cputlb: add tlb_flush_by_mmuidx async routines
cputlb: atomically update tlb fields used by tlb_reset_dirty
cputlb: introduce tlb_flush_*_all_cpus[_synced]
target-arm/powerctl: defer cpu reset work to CPU context
target-arm: don't generate WFE/YIELD calls for MTTCG
target-arm/cpu.h: make ARM_CP defined consistent
target-arm: introduce ARM_CP_EXIT_PC
target-arm: ensure all cross vCPUs TLB flushes complete
tcg: enable MTTCG by default for ARM on x86 hosts
Jan Kiszka (1):
tcg: drop global lock during TCG code execution
KONRAD Frederic (2):
tcg: add options for enabling MTTCG
cputlb: introduce tlb_flush_* async work.
Pranith Kumar (3):
mttcg: translate-all: Enable locking debug in a debug build
mttcg: Add missing tb_lock/unlock() in cpu_exec_step()
tcg: handle EXCP_ATOMIC exception for system emulation
configure | 6 +
cpu-exec-common.c | 3 -
cpu-exec.c | 41 ++--
cpus.c | 343 ++++++++++++++++++++++++++-------
cputlb.c | 465 +++++++++++++++++++++++++++++++++++++--------
docs/multi-thread-tcg.txt | 350 ++++++++++++++++++++++++++++++++++
exec.c | 12 +-
hw/core/irq.c | 1 +
hw/i386/kvmvapic.c | 4 +-
hw/intc/arm_gicv3_cpuif.c | 3 +
hw/ppc/ppc.c | 16 +-
hw/ppc/spapr.c | 3 +
include/exec/cputlb.h | 2 -
include/exec/exec-all.h | 130 +++++++++++--
include/qom/cpu.h | 16 ++
include/sysemu/cpus.h | 2 +
memory.c | 2 +
qemu-options.hx | 20 ++
qom/cpu.c | 10 +
target/arm/arm-powerctl.c | 146 ++++++++------
target/arm/cpu.h | 32 ++--
target/arm/helper.c | 275 ++++++++++++++-------------
target/arm/op_helper.c | 50 ++++-
target/arm/translate-a64.c | 12 +-
target/arm/translate.c | 24 ++-
target/i386/smm_helper.c | 7 +
target/s390x/misc_helper.c | 5 +-
target/sparc/ldst_helper.c | 8 +-
tcg/i386/tcg-target.h | 11 ++
tcg/tcg-mo.h | 48 +++++
tcg/tcg.h | 27 +--
translate-all.c | 66 ++-----
translate-common.c | 21 +-
vl.c | 49 ++++-
34 files changed, 1731 insertions(+), 479 deletions(-)
create mode 100644 docs/multi-thread-tcg.txt
create mode 100644 tcg/tcg-mo.h
--
2.11.0
