On 11/25/2016 04:31 AM, Jin Guojie wrote:
32-bit condition functions(like brcond_i32) should only
compare the low half parts of two 64-bit host registers.
However, MIPS64 does not have distinct instruction for
such operation. The operands should be sign extended
to fit the case.
Gcc handles 32-bit comparison in the same way, as the
following example shows:
[a.c]
main()
{
long a = 0xcccccccc;
long b = 0xdddddddd;
int c = (int)a > (int)b;
}
This problem is why opcodes like
OPC_INDEX_extrl_i64_i32
OPC_INDEX_extrh_i64_i32
OPC_INDEX_ext_i32_i64
OPC_INDEX_extu_i32_i64
exist. The intention is to keep 32-bit values in their sign-extended form,
exactly as the mips hardware manual requires. At which point all 32-bit
opcodes (ADDIU, SLL, etc) will preserve the 32-bit sign extension property.
So you *should* never see a 32-bit comparison input that is not already
sign-extended.
A more appropriate gcc example would be
$ cat z.c
int foo(int a, int b)
{
return a > b;
}
$ mips64-linux-gcc -mabi=64 -O -S z.c
$ cat z.s
...
jr $31
slt $2,$5,$4
...
If you require this patch for getting correct results, then you have found a
bug that needs to be fixed elsewhere. Can you describe the problem that you saw?
r~
