On Thu, Oct 20, 2016 at 05:59:10PM +1100, Nicholas Piggin wrote: > Power ISA specifies ME bit handling for system reset interrupt: > > if the interrupt occurred while the thread was in power-saving > mode, set to 1; otherwise not altered > > Signed-off-by: Nicholas Piggin <npig...@gmail.com>
I've applied this one to ppc-for-2.8. Looks like the remaining
patches in the series need a little more polish.
> ---
> target-ppc/excp_helper.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target-ppc/excp_helper.c b/target-ppc/excp_helper.c
> index 921c39d..53c4075 100644
> --- a/target-ppc/excp_helper.c
> +++ b/target-ppc/excp_helper.c
> @@ -385,11 +385,11 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int
> excp_model, int excp)
> srr1 = SPR_BOOKE_CSRR1;
> break;
> case POWERPC_EXCP_RESET: /* System reset exception
> */
> + /* A power-saving exception sets ME, otherwise it is unchanged */
> if (msr_pow) {
> /* indicate that we resumed from power save mode */
> msr |= 0x10000;
> - } else {
> - new_msr &= ~((target_ulong)1 << MSR_ME);
> + new_msr |= ((target_ulong)1 << MSR_ME);
> }
>
> new_msr |= (target_ulong)MSR_HVB;
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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