On Thu, Oct 06, 2016 at 02:21:06PM +0100, Peter Maydell wrote:
> Add some useful trace events for the ARM generic timers (notably
> the various register writes and the resulting IRQ line state).
Reviewed-by: Edgar E. Iglesias <edgar.igles...@xilinx.com>
>
> Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
> ---
> Makefile.objs | 1 +
> target-arm/helper.c | 20 ++++++++++++++++----
> 2 files changed, 17 insertions(+), 4 deletions(-)
>
> diff --git a/Makefile.objs b/Makefile.objs
> index 02fb8e7..69fdd48 100644
> --- a/Makefile.objs
> +++ b/Makefile.objs
> @@ -155,6 +155,7 @@ trace-events-y += hw/alpha/trace-events
> trace-events-y += ui/trace-events
> trace-events-y += audio/trace-events
> trace-events-y += net/trace-events
> +trace-events-y += target-arm/trace-events
> trace-events-y += target-i386/trace-events
> trace-events-y += target-sparc/trace-events
> trace-events-y += target-s390x/trace-events
> diff --git a/target-arm/helper.c b/target-arm/helper.c
> index 23792ab..5fcdc2b 100644
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c
> @@ -1,4 +1,5 @@
> #include "qemu/osdep.h"
> +#include "trace.h"
> #include "cpu.h"
> #include "internals.h"
> #include "exec/gdbstub.h"
> @@ -1560,10 +1561,13 @@ static void gt_recalc_timer(ARMCPU *cpu, int timeridx)
> /* Note that this must be unsigned 64 bit arithmetic: */
> int istatus = count - offset >= gt->cval;
> uint64_t nexttick;
> + int irqstate;
>
> gt->ctl = deposit32(gt->ctl, 2, 1, istatus);
> - qemu_set_irq(cpu->gt_timer_outputs[timeridx],
> - (istatus && !(gt->ctl & 2)));
> +
> + irqstate = (istatus && !(gt->ctl & 2));
> + qemu_set_irq(cpu->gt_timer_outputs[timeridx], irqstate);
> +
> if (istatus) {
> /* Next transition is when count rolls back over to zero */
> nexttick = UINT64_MAX;
> @@ -1580,11 +1584,13 @@ static void gt_recalc_timer(ARMCPU *cpu, int timeridx)
> nexttick = INT64_MAX / GTIMER_SCALE;
> }
> timer_mod(cpu->gt_timer[timeridx], nexttick);
> + trace_arm_gt_recalc(timeridx, irqstate, nexttick);
> } else {
> /* Timer disabled: ISTATUS and timer output always clear */
> gt->ctl &= ~4;
> qemu_set_irq(cpu->gt_timer_outputs[timeridx], 0);
> timer_del(cpu->gt_timer[timeridx]);
> + trace_arm_gt_recalc_disabled(timeridx);
> }
> }
>
> @@ -1610,6 +1616,7 @@ static void gt_cval_write(CPUARMState *env, const
> ARMCPRegInfo *ri,
> int timeridx,
> uint64_t value)
> {
> + trace_arm_gt_cval_write(timeridx, value);
> env->cp15.c14_timer[timeridx].cval = value;
> gt_recalc_timer(arm_env_get_cpu(env), timeridx);
> }
> @@ -1629,6 +1636,7 @@ static void gt_tval_write(CPUARMState *env, const
> ARMCPRegInfo *ri,
> {
> uint64_t offset = timeridx == GTIMER_VIRT ? env->cp15.cntvoff_el2 : 0;
>
> + trace_arm_gt_tval_write(timeridx, value);
> env->cp15.c14_timer[timeridx].cval = gt_get_countervalue(env) - offset +
> sextract64(value, 0, 32);
> gt_recalc_timer(arm_env_get_cpu(env), timeridx);
> @@ -1641,6 +1649,7 @@ static void gt_ctl_write(CPUARMState *env, const
> ARMCPRegInfo *ri,
> ARMCPU *cpu = arm_env_get_cpu(env);
> uint32_t oldval = env->cp15.c14_timer[timeridx].ctl;
>
> + trace_arm_gt_ctl_write(timeridx, value);
> env->cp15.c14_timer[timeridx].ctl = deposit64(oldval, 0, 2, value);
> if ((oldval ^ value) & 1) {
> /* Enable toggled */
> @@ -1649,8 +1658,10 @@ static void gt_ctl_write(CPUARMState *env, const
> ARMCPRegInfo *ri,
> /* IMASK toggled: don't need to recalculate,
> * just set the interrupt line based on ISTATUS
> */
> - qemu_set_irq(cpu->gt_timer_outputs[timeridx],
> - (oldval & 4) && !(value & 2));
> + int irqstate = (oldval & 4) && !(value & 2);
> +
> + trace_arm_gt_imask_toggle(timeridx, irqstate);
> + qemu_set_irq(cpu->gt_timer_outputs[timeridx], irqstate);
> }
> }
>
> @@ -1715,6 +1726,7 @@ static void gt_cntvoff_write(CPUARMState *env, const
> ARMCPRegInfo *ri,
> {
> ARMCPU *cpu = arm_env_get_cpu(env);
>
> + trace_arm_gt_cntvoff_write(value);
> raw_write(env, ri, value);
> gt_recalc_timer(cpu, GTIMER_VIRT);
> }
> --
> 2.7.4
>
