It is my job to make qemu-arm implement the SWPcc instruction atomically. Currently, qemu implements this instruction as a load followed by a store, in a way vulnerable to race conditions.
We are extending qemu to handle a high number of processors, and our simple testcase using pthreads seems to cause a deadlock somewhere in qemu. It is the beliefs of my professor and I that the implementation of SWP is the reason. How would I go about modifying the qemu source to implement SWP atomically? I have been studying the source for a few days now, and I am at a loss as to what all needs to be done. I feel it would be most desirable to add a TCG_SWAP instruction that is guaranteed to be an atomic compare-and-swap, and implement that as needed. Best, Kaedenn -- Undergraduate Student University of California, Santa Cruz
