On 21 September 2016 at 21:40, Alistair Francis <alistair.fran...@xilinx.com> wrote: > On Wed, Sep 21, 2016 at 11:09 AM, Nathan Rossi <nat...@nathanrossi.com> wrote: >> Whilst according to the Zynq TRM this device covers a register region of >> 0x000 - 0x120. The register region is also shared with XADCIF prefix >> registers at 0x100 and above. Due to how the devcfg and the xadc devices >> are implemented in QEMU these are separate models with individual mmio >> regions. As such the region registered by the devcfg overlaps with the >> xadc when initialized in a machine model (e.g. xilinx-zynq-a9). >> >> This patch fixes up the incorrect region size, where >> XLNX_ZYNQ_DEVCFG_R_MAX is missing its '/ 4' causing it to be 0x460 in >> size. As well as setting the region size to the 0x0 - 0x100 region so >> that an xadc device instance can be registered in the correct region to >> pair with the devcfg device instance. >> >> Mapping with XLNX_ZYNQ_DEVCFG_R_MAX = 0x118: >> dev: xlnx.ps7-dev-cfg, id "" >> mmio 00000000f8007000/0000000000000460 >> dev: xlnx,zynq-xadc, id "" >> mmio 00000000f8007100/0000000000000020 >> >> Mapping with XLNX_ZYNQ_DEVCFG_R_MAX = 0x100 / 4: >> dev: xlnx.ps7-dev-cfg, id "" >> mmio 00000000f8007000/0000000000000100 >> dev: xlnx,zynq-xadc, id "" >> mmio 00000000f8007100/0000000000000020 >> >> Signed-off-by: Nathan Rossi <nat...@nathanrossi.com> > > Good catch. What came up that caused you to find this? > > Can this go via the target-arm queue Peter? > > Reviewed-by: Alistair Francis <alistair.fran...@xilinx.com>
Sure; applied to target-arm.next. thanks -- PMM
