Richard Henderson <r...@twiddle.net> writes:
> Changes since v2:
> * Fix build for 32-bit host without 64-bit atomics.
> Tested with --extra-cflags='-march=-i486'.
> This is patch 15, which might ought to get folded back into
> patch 13 for bisection, but is ugly for review.
Hmm I wonder what's breaking the configure script on Travis:
https://travis-ci.org/stsquad/qemu/builds/158784781
It's not very forthcoming with detail....
>
> * Move a lot of stuff out of softmmu_template.h, and into cputlb.c.
> This is both for code size reduction and readability.
\o/
>
> * Fold in Alex's test-int128 fix.
>
>
> r~
>
>
> Emilio G. Cota (18):
> atomics: add atomic_xor
> atomics: add atomic_op_fetch variants
> target-i386: emulate LOCK'ed cmpxchg using cmpxchg helpers
> target-i386: emulate LOCK'ed OP instructions using atomic helpers
> target-i386: emulate LOCK'ed INC using atomic helper
> target-i386: emulate LOCK'ed NOT using atomic helper
> target-i386: emulate LOCK'ed NEG using cmpxchg helper
> target-i386: emulate LOCK'ed XADD using atomic helper
> target-i386: emulate LOCK'ed BTX ops using atomic helpers
> target-i386: emulate XCHG using atomic helper
> target-i386: remove helper_lock()
> tests: add atomic_add-bench
> target-arm: emulate LL/SC using cmpxchg helpers
> target-arm: emulate SWP with atomic_xchg helper
> target-arm: emulate aarch64's LL/SC using cmpxchg helpers
> linux-user: remove handling of ARM's EXCP_STREX
> linux-user: remove handling of aarch64's EXCP_STREX
> target-arm: remove EXCP_STREX + cpu_exclusive_{test, info}
>
> Richard Henderson (16):
> exec: Avoid direct references to Int128 parts
> int128: Use __int128 if available
> int128: Add int128_make128
> tcg: Add EXCP_ATOMIC
> HACK: Always enable parallel_cpus
> cputlb: Replace SHIFT with DATA_SIZE
> cputlb: Move probe_write out of softmmu_template.h
> cputlb: Remove includes from softmmu_template.h
> cputlb: Move most of iotlb code out of line
> cputlb: Tidy some macros
> tcg: Add atomic helpers
> tcg: Add atomic128 helpers
> tcg: Add CONFIG_ATOMIC64
> target-arm: Rearrange aa32 load and store functions
> target-alpha: Introduce MMU_PHYS_IDX
> target-alpha: Emulate LL/SC using cmpxchg helpers
>
> Makefile.objs | 1 -
> Makefile.target | 1 +
> atomic_template.h | 211 +++++++++++++++++++++++++
> configure | 62 +++++++-
> cpu-exec-common.c | 6 +
> cpu-exec.c | 23 +++
> cpus.c | 6 +
> cputlb.c | 203 ++++++++++++++++++++++--
> exec.c | 4 +-
> include/exec/cpu-all.h | 1 +
> include/exec/exec-all.h | 1 +
> include/qemu-common.h | 1 +
> include/qemu/atomic.h | 42 ++++-
> include/qemu/int128.h | 171 +++++++++++++++++++-
> linux-user/main.c | 326 +++++++-------------------------------
> softmmu_template.h | 104 ++----------
> target-alpha/cpu.h | 22 +--
> target-alpha/helper.c | 16 +-
> target-alpha/helper.h | 9 --
> target-alpha/machine.c | 2 -
> target-alpha/mem_helper.c | 73 ---------
> target-alpha/translate.c | 148 +++++++++--------
> target-arm/cpu.h | 17 +-
> target-arm/helper-a64.c | 113 +++++++++++++
> target-arm/helper-a64.h | 2 +
> target-arm/internals.h | 4 +-
> target-arm/translate-a64.c | 106 ++++++-------
> target-arm/translate.c | 342 ++++++++++++++-------------------------
> target-arm/translate.h | 4 -
> target-i386/helper.h | 4 +-
> target-i386/mem_helper.c | 153 ++++++++++++------
> target-i386/translate.c | 386
> +++++++++++++++++++++++++++++----------------
> tcg-runtime.c | 74 +++++++--
> tcg/tcg-op.c | 342 +++++++++++++++++++++++++++++++++++++++
> tcg/tcg-op.h | 44 ++++++
> tcg/tcg-runtime.h | 109 +++++++++++++
> tcg/tcg.h | 85 ++++++++++
> tests/.gitignore | 1 +
> tests/Makefile.include | 4 +-
> tests/atomic_add-bench.c | 180 +++++++++++++++++++++
> tests/test-int128.c | 22 +--
> translate-all.c | 1 +
> 42 files changed, 2346 insertions(+), 1080 deletions(-)
> create mode 100644 atomic_template.h
> create mode 100644 tests/atomic_add-bench.c
--
Alex Bennée
