David Gibson <da...@gibson.dropbear.id.au> writes:
> [ Unknown signature status ]
> On Fri, Sep 02, 2016 at 12:02:54PM +0530, Nikunj A Dadhania wrote:
>> Signed-off-by: Nikunj A Dadhania <nik...@linux.vnet.ibm.com>
>> ---
>> target-ppc/kvm.c | 2 +-
>> target-ppc/kvm_ppc.h | 2 +-
>> 2 files changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
>> index dcb68b9..20eb450 100644
>> --- a/target-ppc/kvm.c
>> +++ b/target-ppc/kvm.c
>> @@ -2090,7 +2090,7 @@ void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int
>> mpic_proxy)
>>
>> int kvmppc_smt_threads(void)
>> {
>> - return cap_ppc_smt ? cap_ppc_smt : 1;
>> + return cap_ppc_smt ? cap_ppc_smt : 8;
>> }
>>
>> #ifdef TARGET_PPC64
>> diff --git a/target-ppc/kvm_ppc.h b/target-ppc/kvm_ppc.h
>> index 5461d10..053db0a 100644
>> --- a/target-ppc/kvm_ppc.h
>> +++ b/target-ppc/kvm_ppc.h
>> @@ -128,7 +128,7 @@ static inline void kvmppc_set_mpic_proxy(PowerPCCPU
>> *cpu, int mpic_proxy)
>>
>> static inline int kvmppc_smt_threads(void)
>> {
>> - return 1;
>> + return 8;
>> }
>>
>> static inline int kvmppc_or_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits)
>
> This doesn't make sense to me. Allowing multiple hardware threads to
> be emulated in TCG (which I think will require a bunch of fixes) seems
> like a separate question to MTTCG - i.e. allowing separate vcpus to be
> TCG emulated in separate host threads.
Right, I was planning to drop this for now and introduce this later. As
noted in the other thread, i did not consider the multi-core case.
Regards,
Nikunj
