On 14 August 2016 at 23:55, Benjamin Herrenschmidt
<b...@kernel.crashing.org> wrote:
> Looking at this... the attributes are a bit of a mess aren't they ?
>
> The requester_id is pretty much PCI specific and only useful for
> load/stores coming from a device (for IOMMUs), the "secure" bit
> seems to be an ARM thing and is an output from translation,
> what about "user" ?
> IE, it's a blend of things that are input to an access and things
> that are output from translate as far as I can tell ...
The intention is that they are attributes as you would see on
the bus for a memory transaction. In particular for ARM the
'secure' bit corresponds to a transaction attribute indicating
that the access is to the 'secure' physical address space.
'user' also corresponds to an ARM hardware bus signal indicating
the privilege level of the access [devices can behave differently
for user vs non-user accesses, for instance].
requester_id is the bus attribute for 'who sent this transaction'.
In real ARM AXI bus hardware this can distinguish which core
in the CPU sent the transaction, though we don't model this in
QEMU. It's not PCI specific, it just happens that our current
use for it is PCI related. (The ARM GICv3 ITS interrupt controller
hardware distinguishes which device just asked it to do something
by looking at the ID of the memory write that the device did.
It looks like x86 has a use for it too.)
'secure' is used also by x86 but for somewhat different purposes
relating to SMM.
Some of these attributes are determined before the MMU
(eg "user", "requester ID"), and some of them are (for
a particular CPU architecture) determined by the MMU
from the translation tables ("secure"). From the point of
view of the CPU as a whole (or other transaction master)
they're all outputs, though.
thanks
-- PMM
