This series contains 10 new instructions for POWER9 ISA3.0.
Use newer qemu load/store tcg helpers and optimize stxvw4x and lxvw4x.
Patches:
01: xxspltib: VSX Vector Splat Immediate Byte
02: Use tcg_gen_qemu_ld and write consolidated macro
03: Use tcg_gen_qemu_st and write consolidated macro
04: darn: Deliver A Random Number
05: lxsibzx - Load VSX Scalar as Integer Byte & Zero Indexed
lxsihzx - Load VSX Scalar as Integer Halfword & Zero Indexed
06: stxsibx - Store VSX Scalar as Integer Byte Indexed
stxsihx - Store VSX Scalar as Integer Halfword Indexed
07: lxvw4x - improve implementation
08: lxvb16x: Load VSX Vector Byte*16
lxvh8x: Load VSX Vector Halfword*8
09: stxv4x - improve implementation
10: stxvb16x: Store VSX Vector Byte*16
stxvh8x: Store VSX Vector Halfword*8
Changelog:
v0:
* darn - read /dev/random to get the random number
* xxspltib - make is PPC64 only
* Consolidate load/store operations and use macros to generate qemu_st/ld
* Simplify load/store vsx endian manipulation
Nikunj A Dadhania (9):
target-ppc: add xxspltib instruction
target-ppc: consolidate load operations
target-ppc: consolidate store operations
target-ppc: add lxsi[bw]zx instruction
target-ppc: add stxsi[bh]x instruction
target-ppc: improve lxvw4x implementation
target-ppc: add lxvb16x and lxvh8x
target-ppc: improve stxvw4x implementation
target-ppc: add stxvb16x and stxvh8x
Ravi Bangoria (1):
target-ppc: Implement darn instruction
target-ppc/helper.h | 4 +
target-ppc/int_helper.c | 51 ++++++++++
target-ppc/mem_helper.c | 11 ++
target-ppc/translate.c | 131 ++++++++++++------------
target-ppc/translate/vsx-impl.inc.c | 195 +++++++++++++++++++++++++++++++-----
target-ppc/translate/vsx-ops.inc.c | 15 +++
6 files changed, 318 insertions(+), 89 deletions(-)
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2.7.4
