On Tue, Aug 9, 2016 at 11:27 PM, David Kiarie <davidkiar...@gmail.com> wrote:
> Hi all, > > This patchset adds basic AMD IOMMU emulation support to Qemu. > > Change since v14 > -MMIO register reading/write bug fix [Peter] > -Endian-ness issue fix[Peter] > -Bitfields layouts in IOMMU commands fix[Peter] > I seem to have left out a few of this. -IVRS changed IVHD device entry from type 3 to 1 to save a few bytes > -coding style issues, comment grammer and other miscellaneous fixes. > > Changes since v13 > -Added an error to make AMD IOMMU incompatible with device > assignment.[Alex] > -Converted AMD IOMMU into a composite PCI and System Bus device. This > helps with: > -We can now inherit from X86 IOMMU base class(which is implemented > as a System Bus device). > -We can now reserve MMIO region for IOMMU without a BAR register and > without a hack. > > Changes since v12 > > -Coding style fixes [Jan, Michael] > -Error logging fix to avoid using a macro[Jan] > -moved some PCI macros to PCI header[Jan] > -Use a lookup table for MMIO register names when tracing[Jan] > > Changes since V11 > -AMD IOMMU is not started with -device amd-iommu (with a dependency on > Marcel's patches). > -IOMMU commands are represented using bitfields which is less error > prone and more readable[Peter] > -Changed from debug fprintfs to tracing[Jan] > > Changes since V10 > > -Support for huge pages including some obscure AMD IOMMU feature that > allows default page size override[Jan]. > -Fixed an issue with generation of interrupts. We noted that AMD IOMMU > has BusMaster- and is therefore not able to generate interrupts like any > other PCI device. We have resulted in writing directly to system address > but this could be fixed by some patches which have not been merged yet. > > Changes since v9 > > -amd_iommu prefixes have been renamed to a shorter 'amdvi' both in the > macros > and in the functions/code. The register macros have not been moved to > the > implementation file since almost the macros there are basically macros > and I > reckoned renaming them should suffice. > -taken care of byte order in the use of 'dma_memory_read'[Michael] > -Taken care of invalid DTE entries to ensure no DMA unless a device is > configured to allow it. > -An issue with the emulate IOMMU defaulting to AMD_IOMMU has been > fixed[Marcel] > > You can test[1] this patches by starting with parameters > qemu-system-x86_64 -M -device amd-iommu -m 2G -enable-kvm -smp 4 -cpu > host -hda file.img -soundhw ac97 > emulating whatever devices you want. > > Not passing any command line parameters to linux should be enough to test > this patches since the devices are basically > passes-through but to the 'host' (l1 guest). You can still go ahead pass > command line parameter 'iommu=pt iommu=1' > and try to pass a device to L2 guest. This can also done without passing > any iommu related parameters to the kernel. > > David Kiarie (4): > hw/pci: Prepare for AMD IOMMU > hw/i386/trace-events: Add AMD IOMMU trace events > hw/i386: Introduce AMD IOMMU > hw/i386: AMD IOMMU IVRS table > > hw/acpi/aml-build.c | 2 +- > hw/i386/Makefile.objs | 1 + > hw/i386/acpi-build.c | 76 ++- > hw/i386/amd_iommu.c | 1401 ++++++++++++++++++++++++++++++ > +++++++++++++ > hw/i386/amd_iommu.h | 390 ++++++++++++ > hw/i386/intel_iommu.c | 1 + > hw/i386/trace-events | 36 ++ > hw/i386/x86-iommu.c | 6 + > include/hw/acpi/aml-build.h | 1 + > include/hw/i386/x86-iommu.h | 12 + > include/hw/pci/pci.h | 4 +- > 11 files changed, 1919 insertions(+), 11 deletions(-) > create mode 100644 hw/i386/amd_iommu.c > create mode 100644 hw/i386/amd_iommu.h > > -- > 2.1.4 > >
