Hello,
David Gibson (da...@gibson.dropbear.id.au) wrote:
> On Fri, Jun 03, 2016 at 05:45:49PM +0200, Jakub Horak wrote:
> > Hello,
> > I think there's a bug in "wait" instruction code generator for PowerPC
> > architecture. It doesn't make sense to store a non-initialized register.
> >
> > Best regards,
> > Jakub Horak
>
> The fix looks correct, but I need a Signed-off-by line in order to
> apply it.
Here you go:
Fixed bug in code generator.
Signed-off-by: Jakub Horak <them...@ibawizard.net>
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index f5ceae5..6af567b 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -3439,7 +3439,7 @@ static void gen_sync(DisasContext *ctx)
/* wait */
static void gen_wait(DisasContext *ctx)
{
- TCGv_i32 t0 = tcg_temp_new_i32();
+ TCGv_i32 t0 = tcg_const_i32(1);
tcg_gen_st_i32(t0, cpu_env,
-offsetof(PowerPCCPU, env) + offsetof(CPUState, halted));
tcg_temp_free_i32(t0);
>
> In future, please send such patches to myself and Alex Graf
> (target-ppc maintainers) the qemu-ppc list as well as qemu-devel. I
> wouldn't have spotted this if Marc Cave-Ayland hadn't copied it to me.
Sorry, I'll be more thoughtful next time.
Best regards,
Jakub
>
> >
> >
> > diff --git a/target-ppc/translate.c b/target-ppc/translate.c
> > index f5ceae5..6af567b 100644
> > --- a/target-ppc/translate.c
> > +++ b/target-ppc/translate.c
> > @@ -3439,7 +3439,7 @@ static void gen_sync(DisasContext *ctx)
> > /* wait */
> > static void gen_wait(DisasContext *ctx)
> > {
> > - TCGv_i32 t0 = tcg_temp_new_i32();
> > + TCGv_i32 t0 = tcg_const_i32(1);
> > tcg_gen_st_i32(t0, cpu_env,
> > -offsetof(PowerPCCPU, env) + offsetof(CPUState,
> > halted));
> > tcg_temp_free_i32(t0);
> >
>
> --
> David Gibson | I'll have my music baroque, and my code
> david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_
> _other_
> | _way_ _around_!
> http://www.ozlabs.org/~dgibson
