The ARM states that this bit indicates the stack
being used, which in handler mode is always MSP.
Further CONTROL<1>==1 in handler mode is reserved.
With the TM4C always CONTROL<1>==0 in handler mode
which inconveniently prevents the handler from
knowing which stack thread mode was using...
This bit is a direct indication of which stack pointer
register is "aliased" to r13, so easiest to eliminate
the now redundant current_sp field.
---
target-arm/cpu.h | 1 -
target-arm/helper.c | 20 ++++++++++----------
target-arm/machine.c | 1 -
3 files changed, 10 insertions(+), 12 deletions(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index b93f8ae..01c9cdb 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -402,7 +402,6 @@ typedef struct CPUARMState {
uint32_t mmfar; /* MemManage Fault Address */
uint32_t bfar; /* BusFault Address */
unsigned mpu_hfnmiena; /* MPU_CTRL not mappable into SCTLR */
- int current_sp;
int exception;
int exception_prio;
unsigned pending;
diff --git a/target-arm/helper.c b/target-arm/helper.c
index a5adf2d..2661da4 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -5362,14 +5362,14 @@ static uint32_t v7m_pop(CPUARMState *env)
}
/* Switch to V7M main or process stack pointer. */
-static void switch_v7m_sp(CPUARMState *env, int process)
+static void switch_v7m_sp(CPUARMState *env, bool process)
{
uint32_t tmp;
- if (env->v7m.current_sp != process) {
+ if (!!(env->v7m.control & 2) != process) {
tmp = env->v7m.other_sp;
env->v7m.other_sp = env->regs[13];
env->regs[13] = tmp;
- env->v7m.current_sp = process;
+ env->v7m.control = (env->v7m.control & ~2) | (process ? 2 : 0);
}
}
@@ -5457,7 +5457,7 @@ static void do_v7m_exception_exit(CPUARMState *env)
xpsr = v7m_pop(env);
xpsr_write(env, xpsr, 0xfffffdff);
- assert(env->v7m.exception!=-42);
+ assert(env->v7m.exception != -42);
/* Undo stack alignment. */
if (xpsr & 0x200)
@@ -5528,7 +5528,7 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
arm_log_exception(cs->exception_index);
lr = 0xfffffff1;
- if (env->v7m.current_sp)
+ if (env->v7m.control & 2)
lr |= 4;
if (env->v7m.exception == 0)
lr |= 8;
@@ -7550,9 +7550,9 @@ uint32_t HELPER(v7m_mrs)(CPUARMState *env, uint32_t reg)
switch (reg) {
case 8: /* MSP */
- return env->v7m.current_sp ? env->v7m.other_sp : env->regs[13];
+ return env->v7m.control & 2 ? env->v7m.other_sp : env->regs[13];
case 9: /* PSP */
- return env->v7m.current_sp ? env->regs[13] : env->v7m.other_sp;
+ return env->v7m.control & 2 ? env->regs[13] : env->v7m.other_sp;
case 16: /* PRIMASK */
return (env->daif & PSTATE_I) != 0;
case 17: /* BASEPRI */
@@ -7582,13 +7582,13 @@ void HELPER(v7m_msr)(CPUARMState *env, uint32_t reg,
uint32_t val)
}
break;
case 8: /* MSP */
- if (env->v7m.current_sp)
+ if (env->v7m.control & 2)
env->v7m.other_sp = val;
else
env->regs[13] = val;
break;
case 9: /* PSP */
- if (env->v7m.current_sp)
+ if (env->v7m.control & 2)
env->regs[13] = val;
else
env->v7m.other_sp = val;
@@ -7616,8 +7616,8 @@ void HELPER(v7m_msr)(CPUARMState *env, uint32_t reg,
uint32_t val)
}
break;
case 20: /* CONTROL */
- env->v7m.control = val & 3;
switch_v7m_sp(env, (val & 2) != 0);
+ env->v7m.control = (env->v7m.control & ~1) | (val & 1);
break;
default:
qemu_log_mask(LOG_GUEST_ERROR, "Attempt to write unknown special"
diff --git a/target-arm/machine.c b/target-arm/machine.c
index 8852410..dab1626 100644
--- a/target-arm/machine.c
+++ b/target-arm/machine.c
@@ -105,7 +105,6 @@ static const VMStateDescription vmstate_m = {
VMSTATE_UINT32(env.v7m.hfsr, ARMCPU),
VMSTATE_UINT32(env.v7m.mmfar, ARMCPU),
VMSTATE_UINT32(env.v7m.bfar, ARMCPU),
- VMSTATE_INT32(env.v7m.current_sp, ARMCPU),
VMSTATE_UINT32(env.v7m.mpu_hfnmiena, ARMCPU),
VMSTATE_INT32(env.v7m.exception, ARMCPU),
VMSTATE_END_OF_LIST()
--
2.1.4
