On 10/06/15 01:51, Kevin O'Connor wrote:
> Return a static signature ("QEMU CFG") if the guest does a read to the
> DMA address io register.
>
> Signed-off-by: Kevin O'Connor <ke...@koconnor.net>
> ---
>
> Marc, if you decide to respin your fw_cfg series, I've updated the dma
> signature patch. This addresses the comments from Stefan, and I hope
> it addresses the comments from Laszlo.
Thank you -- I didn't know about extract64().
The patch looks good to me, but I think the QEMU coding style requries
/* ... */ comments, and forbids //.
... "scripts/checkpatch.pl" has the following snippet:
# no C99 // comments
if ($line =~ m{//}) {
ERROR("do not use C99 // comments\n" . $herecurr);
}
...
Thanks!
Laszlo
>
> BTW, if you wanted to, it's possible to use deposit64 in
> fw_cfg_dma_mem_write() to support all possible (validly aligned) write
> sizes. Then fw_cfg_dma_mem_valid() shouldn't be needed. Something
> like:
>
> static void fw_cfg_dma_mem_write(void *opaque, hwaddr addr,
> uint64_t value, unsigned size)
> {
> FWCfgState *s = opaque;
> s->dma_addr = deposit64(s->dma_addr, (8 - addr - size)*8, size*8, value);
> if (addr + size >= 8) {
> fw_cfg_dma_transfer(s);
> }
> }
>
> ---
> docs/specs/fw_cfg.txt | 3 +++
> hw/nvram/fw_cfg.c | 14 ++++++++++++--
> 2 files changed, 15 insertions(+), 2 deletions(-)
>
> diff --git a/docs/specs/fw_cfg.txt b/docs/specs/fw_cfg.txt
> index 2d6b2da..cbdce7d 100644
> --- a/docs/specs/fw_cfg.txt
> +++ b/docs/specs/fw_cfg.txt
> @@ -93,6 +93,9 @@ by selecting the "signature" item using key 0x0000
> (FW_CFG_SIGNATURE),
> and reading four bytes from the data register. If the fw_cfg device is
> present, the four bytes read will contain the characters "QEMU".
>
> +If the DMA interface is available, then reading the DMA Address
> +Register returns 0x51454d5520434647 ("QEMU CFG" in big-endian format).
> +
> === Revision / feature bitmap (Key 0x0001, FW_CFG_ID) ===
>
> A 32-bit little-endian unsigned int, this item is used to check for enabled
> diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c
> index 59933b3..cf5c5c4 100644
> --- a/hw/nvram/fw_cfg.c
> +++ b/hw/nvram/fw_cfg.c
> @@ -53,6 +53,8 @@
> #define FW_CFG_DMA_CTL_SKIP 0x04
> #define FW_CFG_DMA_CTL_SELECT 0x08
>
> +#define FW_CFG_DMA_SIGNATURE 0x51454d5520434647 /* "QEMU CFG" */
> +
> typedef struct FWCfgEntry {
> uint32_t len;
> uint8_t *data;
> @@ -393,6 +395,13 @@ static void fw_cfg_dma_transfer(FWCfgState *s)
> trace_fw_cfg_read(s, 0);
> }
>
> +static uint64_t fw_cfg_dma_mem_read(void *opaque, hwaddr addr,
> + unsigned size)
> +{
> + // Return a signature value (and handle various read sizes)
> + return extract64(FW_CFG_DMA_SIGNATURE, (8 - addr - size) * 8, size*8);
> +}
> +
> static void fw_cfg_dma_mem_write(void *opaque, hwaddr addr,
> uint64_t value, unsigned size)
> {
> @@ -416,8 +425,8 @@ static void fw_cfg_dma_mem_write(void *opaque, hwaddr
> addr,
> static bool fw_cfg_dma_mem_valid(void *opaque, hwaddr addr,
> unsigned size, bool is_write)
> {
> - return is_write && ((size == 4 && (addr == 0 || addr == 4)) ||
> - (size == 8 && addr == 0));
> + return !is_write || ((size == 4 && (addr == 0 || addr == 4)) ||
> + (size == 8 && addr == 0));
> }
>
> static bool fw_cfg_data_mem_valid(void *opaque, hwaddr addr,
> @@ -488,6 +497,7 @@ static const MemoryRegionOps fw_cfg_comb_mem_ops = {
> };
>
> static const MemoryRegionOps fw_cfg_dma_mem_ops = {
> + .read = fw_cfg_dma_mem_read,
> .write = fw_cfg_dma_mem_write,
> .endianness = DEVICE_BIG_ENDIAN,
> .valid.accepts = fw_cfg_dma_mem_valid,
>
