[Qemu-devel] [PATCH] target-tilegx: Support iret instruction and related special registers

[gang . chen . 5i5j]

From: Chen Gang <gang.chen.5...@gmail.com>

Acording to the __longjmp tilegx libc implementation, and reference from
tilegx ISA document, we can left iret instruction empty. The related
code is below:

  ENTRY (__longjmp)
         FEEDBACK_ENTER(__longjmp)

  #define RESTORE(r) { LD r, r0 ; ADDI_PTR r0, r0, REGSIZE }
         FOR_EACH_CALLEE_SAVED_REG(RESTORE)

         {
          LD r2, r0       ; retrieve ICS bit from jmp_buf
          movei r3, 1
          CMPEQI r0, r1, 0
         }

         {
          mtspr INTERRUPT_CRITICAL_SECTION, r3
          shli r2, r2, SPR_EX_CONTEXT_0_1__ICS_SHIFT
         }

         {
          mtspr EX_CONTEXT_0_0, lr
          ori r2, r2, RETURN_PL
         }

         {
          or r0, r1, r0
          mtspr EX_CONTEXT_0_1, r2
         }

         iret

         jrp lr

So can let busybox sh run correctly.

Signed-off-by: Chen Gang <gang.chen.5...@gmail.com>
---
 target-tilegx/cpu.h       | 2 ++
 target-tilegx/translate.c | 8 +++++++-
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/target-tilegx/cpu.h b/target-tilegx/cpu.h
index 4b05cd2..02e1a18 100644
--- a/target-tilegx/cpu.h
+++ b/target-tilegx/cpu.h
@@ -54,6 +54,8 @@ enum {
     TILEGX_SPR_CRITICAL_SEC = 1,
     TILEGX_SPR_SIM_CONTROL = 2,
     TILEGX_SPR_EX_CONTEXT_1 = 3,
+    TILEGX_SPR_EX_CONTEXT_0_0 = 4,
+    TILEGX_SPR_EX_CONTEXT_0_1 = 5,
     TILEGX_SPR_COUNT
 };
 
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 7232361..77447ec 100644
--- a/target-tilegx/translate.c
+++ b/target-tilegx/translate.c
@@ -562,8 +562,10 @@ static TileExcp gen_rr_opcode(DisasContext *dc, unsigned 
opext,
         break;
     case OE_RR_X0(FSINGLE_PACK1):
     case OE_RR_Y0(FSINGLE_PACK1):
-    case OE_RR_X1(IRET):
         return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
+    case OE_RR_X1(IRET):
+        mnemonic = "iret";
+        break;
     case OE_RR_X1(LD1S):
         memop = MO_SB;
         mnemonic = "ld1s";
@@ -1813,6 +1815,10 @@ static const TileSPR *find_spr(unsigned spr)
       offsetof(CPUTLGState, spregs[TILEGX_SPR_CRITICAL_SEC]), 0, 0)
     D(SIM_CONTROL,
       offsetof(CPUTLGState, spregs[TILEGX_SPR_SIM_CONTROL]), 0, 0)
+    D(EX_CONTEXT_0_0,
+      offsetof(CPUTLGState, spregs[TILEGX_SPR_EX_CONTEXT_0_0]), 0, 0)
+    D(EX_CONTEXT_0_1,
+      offsetof(CPUTLGState, spregs[TILEGX_SPR_EX_CONTEXT_0_1]), 0, 0)
     }
 
 #undef D
-- 
1.9.3