From: "Edgar E. Iglesias" <edgar.igles...@xilinx.com>
Hi,
This is another series with small steps towards EL2 emulation.
Patch 1 is a fix to allow easier testing of EL3-less cores.
Patches 2 and on add regs and a few small steps towards 2-stage MMU.
Comments welcome!
Best regards,
Edgar
v1 -> v2:
* Add fix for gracefully handling missing has_el2 CPU props
* Dropped suppress of TTBR1 for S2 (unneeded)
* Comment on vttbr_write TLB flush
* Mark second instance of VTTBR as ALIAS
* Split the active aa32ns_aa64any into separate AA32/AA64 registrations to
allow the AA64 one to avoid .access checks
* VTCR does not need TLB flushes
* Various CP_CONST/resetvalue=0 instead of writefns/readfns
* Fix VMPIDR el2 vs el1 typo
* Fix VMPIDR reset value
* Fix spelling of suppress in commit message
Edgar E. Iglesias (8):
hw/cpu/{a15mpcore, a9mpcore}: Handle missing has_el3 CPU props
gracefully
target-arm: Add VTCR_EL2
target-arm: Add VTTBR_EL2
target-arm: Suppress TBI for S2 translations
target-arm: Suppress EPD for S2, EL2 and EL3 translations
target-arm: Add VPIDR_EL2
target-arm: Break out mpidr_read_val()
target-arm: Add VMPIDR_EL2
hw/cpu/a15mpcore.c | 2 +-
hw/cpu/a9mpcore.c | 2 +-
target-arm/cpu.h | 4 ++
target-arm/helper.c | 158 +++++++++++++++++++++++++++++++++++++++++++++++++---
4 files changed, 155 insertions(+), 11 deletions(-)
--
1.9.1
