On Fri, Sep 04, 2015 at 07:12:23PM +0100, Peter Maydell wrote: > On 4 September 2015 at 19:00, Alistair Francis > <alistair.fran...@xilinx.com> wrote: > > On Thu, Sep 3, 2015 at 3:56 PM, Edgar E. Iglesias > > <edgar.igles...@xilinx.com> wrote: > >> On Thu, Sep 03, 2015 at 03:10:52PM -0700, Alistair Francis wrote: > >>> Bit 15 of the PHY Specific Status Register is reserved and > >>> should remain 0. Fix the reset value to ensure that the 15th > >>> bit is not set. > >>> > >>> Signed-off-by: Alistair Francis <alistair.fran...@xilinx.com> > >> > >> Reviewed-by: Edgar E. Iglesias <edgar.igles...@xilinx.com> > > > > Thanks Edgar. > > > > Should this go via the ARM queue? > > I was planning to pick it up, unless Edgar would rather > something else.
Sounds good if you take it Peter, thanks! Best regards, Edgar
