[Qemu-devel] [PATCH 05/20] target-i386: Add cc_op state to insn_start

[Richard Henderson]

Signed-off-by: Richard Henderson <r...@twiddle.net>
---
 target-i386/cpu.h       | 1 +
 target-i386/translate.c | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 74b674d..f0e381c 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -793,6 +793,7 @@ typedef struct {
 #define MAX_GP_COUNTERS    (MSR_IA32_PERF_STATUS - MSR_P6_EVNTSEL0)
 
 #define NB_MMU_MODES 3
+#define TARGET_INSN_START_EXTRA_WORDS 1
 
 #define NB_OPMASK_REGS 8
 
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 4c84c9a..4497c13 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -8019,7 +8019,7 @@ static inline void gen_intermediate_code_internal(X86CPU 
*cpu,
             tcg_ctx.gen_opc_instr_start[lj] = 1;
             tcg_ctx.gen_opc_icount[lj] = num_insns;
         }
-        tcg_gen_insn_start(pc_ptr);
+        tcg_gen_insn_start(pc_ptr, dc->cc_op);
 
         if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO))
             gen_io_start();
-- 
2.4.3