I've flushed out the v13 I posted last Thursday to handle all the
instructions required to execute Hello World. In the process I
found a number of bugs and design flaws in v13, and reshaped the
translation a bit to better handle insns with no register outputs.
Please review.
After this, I would hope that Chen Gang will follow up to implement
the rest of the instructions that he has identified running the
gcc testsuite, and then start in on the floating point.
r~
Chen Gang (9):
linux-user: tilegx: Firstly add architecture related features
linux-user: Support tilegx architecture in linux-user
linux-user: Conditionalize syscalls which are not defined in tilegx
target-tilegx: Add opcode basic implementation from Tilera Corporation
target-tilegx: Modify opcode_tilegx.h to fit QEMU usage
target-tilegx: Add special register information from Tilera
Corporation
target-tilegx: Add cpu basic features for linux-user
target-tilegx: Add several helpers for instructions translation
target-tilegx: Add TILE-Gx building files
Richard Henderson (24):
target-tilegx: Modify _SPECIAL_ opcodes
target-tilegx: Fix LDNA_ADD_IMM8_OPCODE_X1
target-tilegx: Framework for decoding bundles
target-tilegx: Generate SEGV properly
target-tilegx: Handle simple logical operations
target-tilegx: Handle arithmetic instructions
target-tilegx: Handle most bit manipulation instructions
target-tilegx: Handle basic load and store instructions
target-tilegx: Handle post-increment load and store instructions
target-tilegx: Handle unconditional jump instructions
target-tilegx: Handle conditional branch instructions
target-tilegx: Handle comparison instructions
target-tilegx: Implement system and memory management instructions
target-tilegx: Handle bitfield instructions
target-tilegx: Handle shift instructions
target-tilegx: Handle conditional move instructions
target-tilegx: Handle scalar multiply instructions
target-tilegx: Handle mask instructions
target-tilegx: Handle v1cmpeq, v1cmpne
target-tilegx: Handle mtspr, mfspr
target-tilegx: Handle atomic instructions
target-tilegx: Handle v4int_l/h
target-tilegx: Handle v1shli, v1shrui
target-tilegx: Handle v1shl, v1shru, v1shrs
configure | 2 +
default-configs/tilegx-linux-user.mak | 1 +
include/elf.h | 2 +
linux-user/elfload.c | 23 +
linux-user/main.c | 298 +++++
linux-user/syscall.c | 50 +-
linux-user/syscall_defs.h | 14 +-
linux-user/tilegx/syscall.h | 40 +
linux-user/tilegx/syscall_nr.h | 324 +++++
linux-user/tilegx/target_cpu.h | 35 +
linux-user/tilegx/target_signal.h | 28 +
linux-user/tilegx/target_structs.h | 46 +
linux-user/tilegx/termbits.h | 274 +++++
target-tilegx/Makefile.objs | 1 +
target-tilegx/cpu.c | 173 +++
target-tilegx/cpu.h | 177 +++
target-tilegx/helper.c | 93 ++
target-tilegx/helper.h | 10 +
target-tilegx/opcode_tilegx.h | 1406 ++++++++++++++++++++++
target-tilegx/simd_helper.c | 63 +
target-tilegx/spr_def_64.h | 216 ++++
target-tilegx/translate.c | 2135 +++++++++++++++++++++++++++++++++
22 files changed, 5405 insertions(+), 6 deletions(-)
create mode 100644 default-configs/tilegx-linux-user.mak
create mode 100644 linux-user/tilegx/syscall.h
create mode 100644 linux-user/tilegx/syscall_nr.h
create mode 100644 linux-user/tilegx/target_cpu.h
create mode 100644 linux-user/tilegx/target_signal.h
create mode 100644 linux-user/tilegx/target_structs.h
create mode 100644 linux-user/tilegx/termbits.h
create mode 100644 target-tilegx/Makefile.objs
create mode 100644 target-tilegx/cpu.c
create mode 100644 target-tilegx/cpu.h
create mode 100644 target-tilegx/helper.c
create mode 100644 target-tilegx/helper.h
create mode 100644 target-tilegx/opcode_tilegx.h
create mode 100644 target-tilegx/simd_helper.c
create mode 100644 target-tilegx/spr_def_64.h
create mode 100644 target-tilegx/translate.c
--
2.4.3
