On 3 August 2015 at 12:41, Shlomo Pongratz <shlomopongr...@gmail.com> wrote: > > > On Monday, August 3, 2015, Peter Maydell <peter.mayd...@linaro.org> wrote: >> I'm surprised we tell the CPU about the GIC pointer for the >> system register stuff -- I was expecting that we'd give the >> GIC a CPU pointer. (We could in theory implement some >> equivalent of the architected protocol between the redistributors >> and the CPU interfaces, but I think that would be overkill.)
> The problem is that each function added as a system's instruction helper to > target-arm/cpu64.c has the signature of void set(CPUARMState *env, > ARMCPRegInfo *ri, uint64_t value) or uint64_t get(CPUARMState *env, > ARMCPRegInfo *ri) > I just mimicked the way armv7m_nvic_XXXX API works. The v7M NVIC is a terrible example to copy -- it is ancient code mostly written before QEMU acquired various useful abstraction layers, and has received very little maintenance since then. > So in a sense the CPU must be familiar with the GIC (as an opaque object of > course). If the GIC just registers a set of system register information with the CPU then the CPU doesn't need to know that it's the GIC providing those system register functions. (You can use define_arm_cp_regs_with_opaque() to define registers such that your callbacks can fish an opaque data pointer back out of ri->opaque, so you can get back to the GIC data structures.) -- PMM
