On Tue, 30 Jun 2015 21:12:29 -0700 Serge Vakulenko <serge.vakule...@gmail.com> wrote:
> Please find below a set of patches, which allow to simulate Microchip PIC32 > microcontrollers on QEMU. For examples of real PIC32 applications running > on QEMU, see page: https://github.com/sergev/qemu/wiki > > (1) Make the CPU clock frequency configurable per platform. > Currently the clock rate for all MIPS platforms is fixed at 100MHz. > Need to make it 40MHz for pic32mx7. > > (2) For TLBWR instruction, the generated random index value has been not > quite random and did not take into account the Wired register value. > Fixed. > > (3) Added support for external interrupt controller mode (EIC). > Required for pic32. > > (4) Added two processor variants: M4K and microAptivUP. > Needed for pic32mx and pic32mz simulation. > > (5) Added two machine platforms: Microchip pic32mx7 and pic32mz > microcontrollers. Several board types supported for each platform: > > pic32mx7-explorer16 PIC32MX7 microcontroller on Microchip Explorer-16 > board > pic32mx7-max32 PIC32MX7 microcontroller on chipKIT Max32 board > pic32mx7-maximite PIC32MX7 microcontroller on Geoff's Maximite computer > pic32mz-explorer16 PIC32MZ microcontroller on Microchip Explorer-16 > board > pic32mz-meb2 PIC32MZ microcontroller on Microchip MEB-II board > pic32mz-wifire PIC32MZ microcontroller on chipKIT WiFire board > > > Serge Vakulenko (5): > Speed of MIPS CPU timer made configurable per platform. > Fixed random index generation for TLBWR instruction. It was not quite > random and did not skip Wired entries. > Added support for external interrupt controller (EIC) mode. > Two new processor variants: M4K and microAptivP. > Two new machine platforms: pic32mz7 and pic32mz. Please fix your subject lines according to "Write a good commit message" section of http://wiki.qemu.org/Contribute/SubmitAPatch. Also please use the imperative mood in the subject line. -- Best regards, Antony Pavlov
