On Mon, Jun 22, 2015 at 12:06 PM, Jean-Christophe Dubois <j...@tribudubois.net> wrote: > For now we support: > * timers (GPT and EPIT) > * serial ports > * ethernet (through the newly added FEC emulator) > * I2C (through the newly added I2C emulator) > > Signed-off-by: Jean-Christophe Dubois <j...@tribudubois.net> > --- > > Changes since v1: > * Added a ds1338 I2C device for qtest purpose. > > Changes since v2: > * none > > Changes since v3: > * Rework GPL header > * use I2C constructor helper. > > Changes since v4: > * use sysbus_create_simple() instead of I2C constructor helper > > Changes since v5: > * Add ds1338 only for qtest mode. > * small comment fixes. > > Changes since v6: > * Allow for more than 4 serial if suppoted by Qemu. > > hw/arm/Makefile.objs | 1 + > hw/arm/imx25_3ds.c | 273 > +++++++++++++++++++++++++++++++++++++++++++++++++++
So the (new since v6) guideline with ARM SoCs is to split the SoC and machine models. This would give you two files. A SoC file for imx25 and board for 3ds. I'm not 100% on the "3ds" board following some googling but is it really the PDK board? I found this: http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=635baf6b40ebaef683abf87d677467cba71a0d50 and can find product info for PDK from there: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=IMX25PDK To see modern examples of split SoC/board, see stm32f205_soc wiith netduino2 or xlnx-zynqmp with xlnx-ep108 (all in hw/arm). It seems the only board level feature you are implementing is this ds1338 which is not or the real board. So I guess qtest-only code can be left in the SoC model. This would make your board level very similar to netduino2 (perhaps even slightly simpler). Regards, Peter > 2 files changed, 274 insertions(+) > create mode 100644 hw/arm/imx25_3ds.c > > diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs > index cf346c1..3ecb8b1 100644 > --- a/hw/arm/Makefile.objs > +++ b/hw/arm/Makefile.objs > @@ -5,6 +5,7 @@ obj-y += omap_sx1.o palm.o realview.o spitz.o stellaris.o > obj-y += tosa.o versatilepb.o vexpress.o virt.o xilinx_zynq.o z2.o > obj-$(CONFIG_ACPI) += virt-acpi-build.o > obj-y += netduino2.o > +obj-y += imx25_3ds.o > obj-y += sysbus-fdt.o > > obj-y += armv7m.o exynos4210.o pxa2xx.o pxa2xx_gpio.o pxa2xx_pic.o > diff --git a/hw/arm/imx25_3ds.c b/hw/arm/imx25_3ds.c > new file mode 100644 > index 0000000..f495f9a > --- /dev/null > +++ b/hw/arm/imx25_3ds.c > @@ -0,0 +1,273 @@ > +/* > + * Copyright (c) 2013 Jean-Christophe Dubois > + * > + * 3Dstack Board System emulation. > + * > + * Based on hw/arm/kzm.c > + * > + * Copyright (c) 2008 OKL and 2011 NICTA > + * Written by Hans at OK-Labs > + * Updated by Peter Chubb. > + * > + * This program is free software; you can redistribute it and/or modify it > + * under the terms of the GNU General Public License as published by the > + * Free Software Foundation; either version 2 of the License, or > + * (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, but > WITHOUT > + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or > + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License > + * for more details. > + * > + * You should have received a copy of the GNU General Public License along > + * with this program; if not, see <http://www.gnu.org/licenses/>. > + */ > + > +#include "hw/sysbus.h" > +#include "exec/address-spaces.h" > +#include "hw/hw.h" > +#include "hw/arm/arm.h" > +#include "hw/devices.h" > +#include "net/net.h" > +#include "sysemu/sysemu.h" > +#include "hw/boards.h" > +#include "hw/char/serial.h" > +#include "hw/arm/imx.h" > +#include "hw/i2c/i2c.h" > + > +#include "sysemu/qtest.h" > + > +/* Memory map for 3D-Stack Emulation Baseboard: > + * 0x00000000-0x00003fff 16k ROM IGNORED > + * 0x00004000-0x00403fff Reserved IGNORED > + * 0x00404000-0x00408fff 20k ROM IGNORED > + * 0x00409000-0x0fffffff Reserved IGNORED > + * 0x10000000-0x1fffffff Reserved IGNORED > + * 0x20000000-0x2fffffff Reserved IGNORED > + * 0x30000000-0x3fffffff Reserved IGNORED > + * 0x40000000-0x43efffff Reserved IGNORED > + * 0x43f00000-0x6fffffff I.MX25 Internal Register Space > + * 0x43f00000 IO_AREA0 > + * 0x43f80000 I2C0 EMULATED > + * 0x43f84000 I2C2 EMULATED > + * 0x43f98000 I2C1 EMULATED > + * 0x43f90000 UART1 EMULATED > + * 0x43f94000 UART2 EMULATED > + * 0x43fb0000 UART4 IGNORED > + * 0x43fb4000 UART5 IGNORED > + * 0x5000c000 UART3 EMULATED > + * 0x50038000 FEC EMULATED > + * 0x53f80000 CCM EMULATED > + * 0x53f84000 GPT 4 EMULATED > + * 0x53f88000 GPT 3 EMULATED > + * 0x53f8c000 GPT 2 EMULATED > + * 0x53f90000 GPT 1 EMULATED > + * 0x53f94000 PIT 1 EMULATED > + * 0x53f98000 PIT 2 EMULATED > + * 0x53f9c000 GPIO-4 EMULATED > + * 0x53fa4000 GPIO-3 EMULATED > + * 0x53fcc000 GPIO-1 EMULATED > + * 0x53fd0000 GPIO-2 EMULATED > + * 0x68000000 ASIC EMULATED > + * 0x78000000-0x7801ffff SRAM EMULATED > + * 0x78020000-0x7fffffff SRAM Aliasing EMULATED > + * 0x80000000-0x87ffffff RAM + Alias EMULATED > + * 0x90000000-0x9fffffff RAM + Alias EMULATED > + * 0xa0000000-0xa7ffffff Flash IGNORED > + * 0xa8000000-0xafffffff Flash IGNORED > + * 0xb0000000-0xb1ffffff SRAM IGNORED > + * 0xb2000000-0xb3ffffff SRAM IGNORED > + * 0xb4000000-0xb5ffffff CS4 IGNORED > + * 0xb6000000-0xb8000fff Reserved IGNORED > + * 0xb8001000-0xb8001fff SDRAM CTRL reg IGNORED > + * 0xb8002000-0xb8002fff WEIM CTRL reg IGNORED > + * 0xb8003000-0xb8003fff M3IF CTRL reg IGNORED > + * 0xb8004000-0xb8004fff EMI CTRL reg IGNORED > + * 0xb8005000-0xbaffffff Reserved IGNORED > + * 0xbb000000-0xbb000fff NAND flash area buf IGNORED > + * 0xbb001000-0xbb0011ff NAND flash reserved IGNORED > + * 0xbb001200-0xbb001dff Reserved IGNORED > + * 0xbb001e00-0xbb001fff NAN flash CTRL reg IGNORED > + * 0xbb012000-0xbfffffff Reserved IGNORED > + * 0xc0000000-0xffffffff Reserved IGNORED > + */ > + > +#define IMX25_SRAM_ADDRESS (0x78000000) > +#define IMX25_SRAMSIZE (128*1024) > +#define IMX25_CS_SRAMSIZE (128*1024*1024) > +#define IMX25_3DS_ADDRESS (0x80000000) > +#define IMX25_CS_RAMSIZE (256*1024*1024) > + > +static struct arm_boot_info imx25_3ds_binfo = { > + .loader_start = IMX25_3DS_ADDRESS, > + .board_id = 1771, > +}; > + > +static void imx25_3ds_init(MachineState *args) > +{ > + int i; > + int serial_cnt = 0; > + const ram_addr_t ram_size = args->ram_size; > + const char *cpu_model = args->cpu_model; > + const char *kernel_filename = args->kernel_filename; > + const char *kernel_cmdline = args->kernel_cmdline; > + const char *initrd_filename = args->initrd_filename; > + ARMCPU *cpu; > + DeviceState *pic_dev; > + DeviceState *ccm, *i2c_dev; > + MemoryRegion *address_space_mem = get_system_memory(); > + MemoryRegion *sram = g_new(MemoryRegion, 1); > + MemoryRegion *sram_alias = g_new(MemoryRegion, 1); > + static const struct { > + hwaddr addr; > + unsigned int irq; > + } serial_table[] = { > + { 0x43f90000, 45 }, > + { 0x43f94000, 32 }, > + { 0x5000c000, 18 }, > + { 0x50008000, 5 }, > + { 0x5002c000, 40 }, > + { 0, 0 } > + }; > + > + if (!cpu_model) { > + cpu_model = "arm926"; > + } > + > + cpu = cpu_arm_init(cpu_model); > + if (!cpu) { > + fprintf(stderr, "Unable to find CPU definition\n"); > + exit(1); > + } > + > + if (ram_size > (2 * IMX25_CS_RAMSIZE)) { > + fprintf(stderr, "i.MX25 can support only up to %d MB\n", > + 2 * IMX25_CS_RAMSIZE / (1024 * 1024)); > + exit(1); > + } > + > + /* create our main memory */ > + for (i = 0; i <= (ram_size / IMX25_CS_RAMSIZE); i++) { > + ram_addr_t blk_size = ram_size - (IMX25_CS_RAMSIZE * i); > + MemoryRegion *ram; > + char ram_name[20]; > + > + if (blk_size > IMX25_CS_RAMSIZE) { > + blk_size = IMX25_CS_RAMSIZE; > + } > + > + if (blk_size == 0) { > + break; > + } > + > + sprintf(ram_name, "imx25.ram%d", i); > + > + ram = g_new(MemoryRegion, 1); > + memory_region_init_ram(ram, NULL, ram_name, blk_size, &error_abort); > + vmstate_register_ram_global(ram); > + memory_region_add_subregion(address_space_mem, IMX25_3DS_ADDRESS > + + (IMX25_CS_RAMSIZE * i), ram); > + > + /* Add ram alias */ > + if (blk_size < IMX25_CS_RAMSIZE) { > + MemoryRegion *ram_alias = g_new(MemoryRegion, 1); > + char alias_name[20]; > + > + sprintf(alias_name, "ram.alias%d", i); > + > + memory_region_init_alias(ram_alias, NULL, alias_name, ram, 0, > + IMX25_CS_RAMSIZE - blk_size); > + memory_region_add_subregion(address_space_mem, IMX25_3DS_ADDRESS > + + (IMX25_CS_RAMSIZE * i) + blk_size, > + ram_alias); > + } > + } > + > + /* create the sram area */ > + memory_region_init_ram(sram, NULL, "imx25.sram", IMX25_SRAMSIZE, > &error_abort); > + vmstate_register_ram_global(sram); > + memory_region_add_subregion(address_space_mem, IMX25_SRAM_ADDRESS, > + sram); > + > + /* add sram alias */ > + memory_region_init_alias(sram_alias, NULL, "sram.alias", sram, 0, > + IMX25_CS_SRAMSIZE - IMX25_SRAMSIZE); > + memory_region_add_subregion(address_space_mem, > + IMX25_SRAM_ADDRESS + IMX25_SRAMSIZE, > + sram_alias); > + > + /* add the PIC */ > + pic_dev = sysbus_create_varargs("imx_avic", 0x68000000, > + qdev_get_gpio_in(DEVICE(cpu), > ARM_CPU_IRQ), > + qdev_get_gpio_in(DEVICE(cpu), > ARM_CPU_FIQ), > + NULL); > + > + while (serial_table[serial_cnt].addr && (serial_cnt < MAX_SERIAL_PORTS)) > { > + /* add some serial lines */ > + imx_serial_create(serial_cnt, serial_table[serial_cnt].addr, > + qdev_get_gpio_in(pic_dev, > + serial_table[serial_cnt].irq)); > + serial_cnt++; > + } > + > + ccm = sysbus_create_simple("imx_ccm", 0x53f80000, NULL); > + > + /* add gpt timers */ > + imx_timerg_create(0x53f84000, qdev_get_gpio_in(pic_dev, 1), ccm); > + imx_timerg_create(0x53f88000, qdev_get_gpio_in(pic_dev, 29), ccm); > + imx_timerg_create(0x53f8c000, qdev_get_gpio_in(pic_dev, 53), ccm); > + imx_timerg_create(0x53f90000, qdev_get_gpio_in(pic_dev, 54), ccm); > + > + /* add epit timers */ > + imx_timerp_create(0x53f94000, qdev_get_gpio_in(pic_dev, 28), ccm); > + imx_timerp_create(0x53f98000, qdev_get_gpio_in(pic_dev, 27), ccm); > + > + imx_fec_create(0, 0x50038000, qdev_get_gpio_in(pic_dev, 57)); > + > + /* I2C 0 */ > + i2c_dev = sysbus_create_simple("imx.i2c", 0x43f80000, > + qdev_get_gpio_in(pic_dev, 3)); > + > + /* add I2C 1 */ > + sysbus_create_simple("imx.i2c", 0x43f98000, qdev_get_gpio_in(pic_dev, > 4)); > + /* add I2C 2 */ > + sysbus_create_simple("imx.i2c", 0x43f84000, qdev_get_gpio_in(pic_dev, > 10)); > + > + imx25_3ds_binfo.ram_size = ram_size; > + imx25_3ds_binfo.kernel_filename = kernel_filename; > + imx25_3ds_binfo.kernel_cmdline = kernel_cmdline; > + imx25_3ds_binfo.initrd_filename = initrd_filename; > + imx25_3ds_binfo.nb_cpus = 1; > + > + /* > + * We test explicitly for qtest here as it is not done (yet?) in > + * arm_load_kernel(). Without this the "make check" command would > + * fail. > + */ > + > + if (!qtest_enabled()) { > + arm_load_kernel(cpu, &imx25_3ds_binfo); > + } else { > + /* > + * This I2C device doesn't exist on the real board. > + * We add it here (only on qtest usage) to be able to do a bit > + * of simple qtest. See "make check" for details. > + */ > + i2c_create_slave((I2CBus *)qdev_get_child_bus(i2c_dev, "i2c"), > + "ds1338", 0x68); > + > + } > +} > + > +static QEMUMachine imx25_3ds_machine = { > + .name = "imx25_3ds", > + .desc = "ARM i.MX25 PDK board (ARM926)", > + .init = imx25_3ds_init, > +}; > + > +static void imx25_3ds_machine_init(void) > +{ > + qemu_register_machine(&imx25_3ds_machine); > +} > + > +machine_init(imx25_3ds_machine_init) > -- > 2.1.4 > >
