On Wed, Jun 03, 2015 at 07:08:46PM +0200, Paolo Bonzini wrote:
> From: Gerd Hoffmann <kra...@redhat.com>
>
> Signed-off-by: Gerd Hoffmann <kra...@redhat.com>
> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>
Reviewed-by: Michael S. Tsirkin <m...@redhat.com>
> ---
> tests/Makefile | 3 ++
> tests/q35-test.c | 91
> ++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 94 insertions(+)
> create mode 100644 tests/q35-test.c
>
> diff --git a/tests/Makefile b/tests/Makefile
> index 729b969..f4721d0 100644
> --- a/tests/Makefile
> +++ b/tests/Makefile
> @@ -174,6 +174,8 @@ gcov-files-i386-y += hw/usb/dev-storage.c
> check-qtest-i386-y += tests/usb-hcd-xhci-test$(EXESUF)
> gcov-files-i386-y += hw/usb/hcd-xhci.c
> check-qtest-i386-y += tests/pc-cpu-test$(EXESUF)
> +check-qtest-i386-y += tests/q35-test$(EXESUF)
> +gcov-files-i386-y += hw/pci-host/q35.c
> check-qtest-i386-$(CONFIG_LINUX) += tests/vhost-user-test$(EXESUF)
> check-qtest-x86_64-y = $(check-qtest-i386-y)
> gcov-files-i386-y += i386-softmmu/hw/timer/mc146818rtc.c
> @@ -389,6 +391,7 @@ tests/usb-hcd-uhci-test$(EXESUF):
> tests/usb-hcd-uhci-test.o $(libqos-usb-obj-y)
> tests/usb-hcd-ehci-test$(EXESUF): tests/usb-hcd-ehci-test.o
> $(libqos-usb-obj-y)
> tests/usb-hcd-xhci-test$(EXESUF): tests/usb-hcd-xhci-test.o
> $(libqos-usb-obj-y)
> tests/pc-cpu-test$(EXESUF): tests/pc-cpu-test.o
> +tests/smram-test$(EXESUF): tests/smram-test.o $(libqos-pc-obj-y)
> tests/vhost-user-test$(EXESUF): tests/vhost-user-test.o qemu-char.o
> qemu-timer.o $(qtest-obj-y)
> tests/qemu-iotests/socket_scm_helper$(EXESUF):
> tests/qemu-iotests/socket_scm_helper.o
> tests/test-qemu-opts$(EXESUF): tests/test-qemu-opts.o libqemuutil.a
> libqemustub.a
> diff --git a/tests/q35-test.c b/tests/q35-test.c
> new file mode 100644
> index 0000000..812abe5
> --- /dev/null
> +++ b/tests/q35-test.c
> @@ -0,0 +1,91 @@
> +/*
> + * QTest testcase for Q35 northbridge
> + *
> + * Copyright (c) 2015 Red Hat, Inc.
> + *
> + * Author: Gerd Hoffmann <kra...@redhat.com>
> + *
> + * This work is licensed under the terms of the GNU GPL, version 2 or later.
> + * See the COPYING file in the top-level directory.
> + */
> +
> +#include <glib.h>
> +#include <string.h>
> +#include "libqtest.h"
> +#include "libqos/pci.h"
> +#include "libqos/pci-pc.h"
> +#include "qemu/osdep.h"
> +#include "hw/pci-host/q35.h"
> +
> +static void smram_set_bit(QPCIDevice *pcidev, uint8_t mask, bool enabled)
> +{
> + uint8_t smram;
> +
> + smram = qpci_config_readb(pcidev, MCH_HOST_BRIDGE_SMRAM);
> + if (enabled) {
> + smram |= mask;
> + } else {
> + smram &= ~mask;
> + }
> + qpci_config_writeb(pcidev, MCH_HOST_BRIDGE_SMRAM, smram);
> +}
> +
> +static bool smram_test_bit(QPCIDevice *pcidev, uint8_t mask)
> +{
> + uint8_t smram;
> +
> + smram = qpci_config_readb(pcidev, MCH_HOST_BRIDGE_SMRAM);
> + return smram & mask;
> +}
> +
> +static void test_smram_lock(void)
> +{
> + QPCIBus *pcibus;
> + QPCIDevice *pcidev;
> + QDict *response;
> +
> + pcibus = qpci_init_pc();
> + g_assert(pcibus != NULL);
> +
> + pcidev = qpci_device_find(pcibus, 0);
> + g_assert(pcidev != NULL);
> +
> + /* check open is settable */
> + smram_set_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN, false);
> + g_assert(smram_test_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN) == false);
> + smram_set_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN, true);
> + g_assert(smram_test_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN) == true);
> +
> + /* lock, check open is cleared & not settable */
> + smram_set_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_LCK, true);
> + g_assert(smram_test_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN) == false);
> + smram_set_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN, true);
> + g_assert(smram_test_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN) == false);
> +
> + /* reset */
> + response = qmp("{'execute': 'system_reset', 'arguments': {} }");
> + g_assert(response);
> + g_assert(!qdict_haskey(response, "error"));
> + QDECREF(response);
> +
> + /* check open is settable again */
> + smram_set_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN, false);
> + g_assert(smram_test_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN) == false);
> + smram_set_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN, true);
> + g_assert(smram_test_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN) == true);
> +}
> +
> +int main(int argc, char **argv)
> +{
> + int ret;
> +
> + g_test_init(&argc, &argv, NULL);
> +
> + qtest_add_func("/q35/smram/lock", test_smram_lock);
> +
> + qtest_start("-M q35");
> + ret = g_test_run();
> + qtest_end();
> +
> + return ret;
> +}
> --
> 2.4.1
>
